• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.285-289
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• 2015

We prepared silver Schottky contacts to O-polar and nonpolar m-plane bulk ZnO wafers. Then, by considering various transport models, we performed a comparative analysis of the current transport properties of Ag/bulk ZnO Schottky diodes, which were measured at 300, 200, and 100 K. The fitting of the forward bias current-voltage (I-V) characteristics revealed that the tunneling current is dominant as the transport component in both the samples. Compared to thermionic emission (TE), a stronger contribution of tunneling current was observed at low temperature. The reverse bias I-V characteristics were well fitted with the thermionic field emission (TFE) in both the samples. The presence of acceptor-like adsorbates, such as O₂ and H₂O, modulated the surface conductive state of ZnO, thereby affecting the tunneling effect. The degree of activation/passivation of acceptor-like adsorbates might be different in both the samples owing to their different surface morphologies and surface defects (e.g., oxygen vacancies).

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.381-386
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• 2013

A new resistance model for a Schottky Barrier Diode (SBD) in CMOS technology is proposed in this paper. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD which is firstly introduced in this paper. The model is verified using the simulation methodology ATLAS. For verification of the analyzed model and the ATLAS simulation results, SBD prototypes are fabricated using a $0.13{\mu}m$ CMOS process. It is demonstrated that the model and simulation results are consistent with measurement results of fabricated SBD.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1612-1614
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• 1996

Analytical expression for the breakdown voltage of the Schottky diode with double epitaxial layer has been obtained. Analytical results agree reasonably with the numerical simulations using MEDICI. It is expected that our results can be used for the optimum design of power MOSFET as well as the Schottky diodes with double epitaxial layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.30-33
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• 1999

본 연구에서는 Pt/f4-SiC Schottky barrier diodes(SBDs)의 소자 성능향상과 미세구조와의 상관관계를 규명하였다. 다른 열처리 온도구간에 따른 금속/SiC 계면의 미세구조 평가는 X-ray scattering법을 사용하여 분석하였다. 소자의 역 방향 특성은 열처리 온도가 증가함에 따라 저하되었다. As-deposited와 $850^{\circ}C$ 온도에서 열처리된 소자의 최대 항복전압은 각각 1300 V와 626 V 이었다. 그러나, 소자의 순방향 특성은 열처리 온도가 증가함에 따라 향상되었다. X-ray scattering법으로 >$650^{\circ}C$ 이상의 열처리 온도에서는 Pt/SiC 계면에서 Pt-silicides가 형성되었고, 이러한 Silicides의 형성이 Pt/SiC 계면의 평활도를 증가시킨 원인이 됨을 보였다. SBDs의 순방향 특성은 열처리 과정동안 Pt/SiC 계면에서 형성된 silicides의 결정성에 강하게 의존함을 알 수 있었다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.152-159
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• 2010

We propose a semi-analytical current conduction model for depletion-mode n-type nanowire field-effect transistors (NWFETs) with top-gate structure. The NWFET model is based on an equivalent circuit consisting of two back-to-back Schottky diodes for the metal-semiconductor (MS) contacts and the intrinsic top-gate NWFET. The intrinsic top-gate NWFET model is derived from the current conduction mechanisms due to bulk charges through the center neutral region as well as of accumulation charges through the surface accumulation region, based on the electrostatic method, and thus it includes all current conduction mechanisms of the NWFET operating at various top-gate bias conditions. Our previously developed Schottky diode model is used for the MS contacts. The newly developed model is integrated into ADS, in which the intrinsic part of the NWFET is developed by utilizing the Symbolically Defined Device (SDD) for an equation-based nonlinear model. The results simulated from the newly developed NWFET model reproduce considerably well the reported experimental results.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.53-53
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• 2000

반도체 산업에서 유기물질의 응용에 많은 관심을 나타내고있으며, 그 응용의 예로는 발광 다이오드(light emitting diode)와 박막트랜지스터(thinfilm transistor)가 주를 이루고 있다. 이러한 유기 물질을 이용하면 소자의 제작 공정의 단순화와 제작 가격을 낮출 수 있는 이점을 기대할 수 있다. 본 연구에서는 유리 기판 위에 pentcence 다이오드를 제작하였다. 유리 기판 위에 silicon dioxide를 PECVD으로 성막하였다. 전극으로는 Ohmic contact를 이루기 위해 금(Au)을 사용하였으며 schottky contact을 이루기 위해서 알루미늄(Al), 인듐(In), 크롬(Cr), 은(Ag), 금(Au)을 각각 사용하였다. 소자의 활성 층으로는 pentcene을 가장 단순한 열 증착법으로 성막하였고, 진공도는 10-8Torr를 유지하였으며 성막 속도는 0.3 $\AA$/sec로 성막하였다. 제작된 소자들은 $\alpha$-step, I-V, C-V, AFM, IR등을 이용하여 측정, 분석하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.241-245
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• 2022

In this study, we measured and comparatively analyzed the characteristics of MPS (Merged Pin Schottky) diodes in 4H-SiC by changing the areal ratio between the Schottky and PN junction region. Increasing the temperature from 298 K to 473 K resulted in the threshold voltage shifting from 0.8 V to 0.5 V. A wider Schottky region indicates a lower on-resistance and a faster turn-on. The effective barrier height was smaller for a wider Schottky region. Additionally, the depletion layer became smaller under the influence of the reduced effective barrier height. The wider Schottky region resulted in the ideality factor being reduced from 1.37 to 1.01, which is closer to an ideal device. The leakage saturation current increased with the widening Schottky region, resulting in a 1.38 times to 2.09 times larger leakage current.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.10
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• pp.25-34
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• 2002

In this paper, silicidation induced Schottky contact area was obtained using the current voltage(I-V) characteristics of shallow cobalt silicided p+-n and n+-p junctions. In reverse bias region, Poole-Frenkel barrier lowering influenced predominantly the reverse leakage current, masking thereby the effect of Schottky contact formation. However, Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n+-p junction in the forward bias region. The increase of leakage current in silicided n+-p diodes is consistent with the formation of Schottky contact via cobalt slicide penetrating into the p-substrate or near to the junction area and generating trap sites. The increase of reverse leakage current is proven to be attributed to the penetration of silicide into depletion region in case of the perimeter intensive n+-p junction. In case of the area intensive n+-p junction, the silicide penetrated near to the depletion region. There is no formation of Schottky contact in case of the p+-n junction where no increase in the leakage current is monitored. The Schottky contact amounting to less than 0.01% of the total junction was extracted by simultaneous characterization of forward and reverse characteristics of silicided n+-p diode.

• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.112.2-112
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• 1998

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.7-12
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• 2010

A semi-empirical organic schottky diode model is proposed for circuit simulation. We have set up a full custom design environment for organic schottky diode circuit using Spectre AHDL, which is widely used commercial EDA tool. We measured frequency response from fabricated rectifier, and it was compared to circuit simulation results using the AHDL model. The frequency response of the fabricated rectifier circuit is not sufficient for 13.56MHz RFID, however, it is enough for 135kHz-band RFID.