• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.1
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• pp.1-12
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• 2003

This paper describes a study on the abnormal behavior of the electrical characteristics of the (n)GaAs/Ti/Pt/Au Schottky contacts prepared by the two techniques of electron beam deposition and rf sputtering and after an annealing treatment. The samples were characterized by I-V and C-V measurements carried out over the temperature range of 150 - 350 K both in the as prepared state and after a 300 C, 30 min. anneal step. The variation of ideality factor with forward bias, the variation of ideality factor and barrier height with temperature and the difference between the capacitance barrier and current barrier show the presence of a thin interfacial oxide layer along with barrier height inhomogenieties at the metal/semiconductor interface. This barrier height inhomogeneity model also explains the lower barrier height for the sputtered samples to be due to the presence of low barrier height patches produced because of high plasma energy. After the annealing step the contacts prepared by electron beam have the highest typical current barrier height of 0.85 eV and capacitance barrier height of 0.86 eV whereas those prepared by sputtering (at the highest power studied) have the lowest typical current barrier height of 0.67 eV and capacitance barrier height of 0.78 eV.

• Journal of the Korean Institute of Telematics and Electronics
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• v.20 no.3
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• pp.33-39
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• 1983

New Schottky devices with thin stepped oxide layer (about 1000 ${\AA}$) along the edge of metal-semiconductor junction have been designed and fabricated. The breakdown voltages of these diodes have been compared with those of conventional metal overlap and P guard ring Schottky diode structures. Thin stepped oxide layer has been grown by the process of T.C.E. oxidation. In order to compare and demonstrate the improved down phenomena of these devices, conventional metal overlap diode and P guard ring which have the same dimension with new devices have also been integrated in a same New Schottty devices structured with thin stepped oxide layer have shown significant improvement in breakdown phenomena compared with conventional diodes.

• Transactions on Electrical and Electronic Materials
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• v.16 no.3
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• pp.151-155
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• 2015

We fabricated the Cu Schottky contact on an n-type Ge wafer and investigated the forward bias current-voltage (I-V) characteristics in the temperature range of 100~300 K. The zero bias barrier height and ideality factor were determined based on the thermionic emission (TE) model. The barrier height increased and the ideality factor decreased with increasing temperature. Such temperature dependence of the barrier height and the ideality factor was associated with spatially inhomogeneous Schottky barriers. A notable deviation from the theoretical Richardson constant (140.0 Acm^-2K^-2 for n-Ge) on the conventional Richardson plot was alleviated by using the modified Richardson plot, which yielded the Richardson constant of 392.5 Acm^-2K^-2. Finally, we applied the theory of space-charge-limitedcurrent (SCLC) transport to the high forward bias region to find the density of localized defect states (N_t), which was determined to be 1.46 × 10¹² eV^-1cm^-3.

• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1013-1018
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• 1996

The annealing effects of Au/Te/Au/n-GaAs structure was investigated by using x-ray diffraction, scanning electron microscope, the specific contact resistance and I-V measurement. Increasing the annealing temperature, the intensity of Au-Ga peak by X-ray diffraction was increased. The Ga$\_$2/Te$\_$3/peak got evident for the samples annealed at 400.deg. C and GaAs peak by recrystallization appeared for the samples annealed at 500.deg. C. The variation from the schottky to low resistance contact was confirmed by I-V curve. The lowest value of the specific contact resistance of the samples annealed at 500.deg. C was 3.8*10$\^$-5/.ohm.-cm$\^$2/ but the value increased above 600.deg. C.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.7
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• pp.16-19
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• 2019

A thinner film has superior electrical properties and a better amorphous structure. Amorphous structures can be effective in improving conductivity through a depletion effect. Research is needed on the Schottky contact, where potential barriers are formed, as a way to identify these characteristics. $SiO_2/SnO_2$ thin films were prepared to examine the amorphous structure and Schottky contact, $SiO_2$ thin films were prepared using Ar = 20 sccm. $SnO_2$ thin films were deposited using mixed gas with a flow rate of argon and oxygen at 20 sccm, and $SnO_2$ thin films were added by magnetron sputtering and treated at $100^{\circ}C$ and $150^{\circ}C$. To identify the conditions under which the amorphous structure was constructed, the XRD patterns were investigated and C-V and I-V measurements were taken to make Al electrodes and perform electrical analysis. The depletion layer was formed by the recombination of electrons and holes through the heat treatment process. $SiO_2/SnO_2$ thin films confirmed that the pores were well formed when heat treated at $100^{\circ}C$ and an electric current was applied over the micro area. An amorphous $SiO_2/SnO_2$ thin film with heat treatment at $100^{\circ}C$ showed no reflection at $33^{\circ}\;2{\theta}$ in the XRD pattern, and a reflection at $44^{\circ}2\;{\theta}$. The macroscopic view (-30 V

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.318.2-318.2
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• 2014

The high contact resistance is still one of the major issues to be resolved in CdS/CdTe thin film solar cells. CdTe/Metal Schottky contact induced a high contact resistance in CdS/CdTe solar cells. It has been reported that the work function of CdTe thin film is more than 5.7 eV. There has not been a suitable back contact metal, because CdTe thin film has a high work function. In a few decades, some buffer layer was reported to improve a back contact problem. Buffer layers which are Te, $Sb_2Te_3$, $Cu_2Te$, ZnTe:Cu and so on was inserted between CdTe and metal electrode. A formed buffer layers made a tunnel junction. Hole carriers which was excited in CdTe film by light absorption was transported from CdTe to back metal electrode. In this report, we reported the variation of solar cell performance with different buffer layer at the back contact of CdTe thin film solar cell.

• Korean Journal of Materials Research
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• v.13 no.1
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• pp.11-17
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• 2003

DC characteristics of recessed gate 4H-SiC MESFET were investigated using the device/circuit simulation tool, PISCES. Results of theoretical calculation were compared with the experimental data for the extraction of modeling parameters which were implemented for the prediction of DC and gate leakage characteristics at high temperatures. The current-voltage analysis using a fixed mobility model revealed that the short channel effect is influenced by the defects in SiC. The incomplete ionization models are found out significant physical models for an accurate prediction of SiC device performance. Gate leakage is shown to increase with the device operation temperatures and to decrease with the Schottky barrier height of gate metal.

• Transactions on Electrical and Electronic Materials
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• v.17 no.5
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• pp.293-296
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• 2016

Using capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements, the electrical properties of Cu/n-InP Schottky diodes were investigated. The values of C and G/ω were found to decrease with increasing frequency. The presence of interface states might cause excess capacitance, leading to frequency dispersion. The negative capacitance was observed under a forward bias voltage, which may be due to contact injection, interface states or minority-carrier injection. The barrier heights from C-V measurements were found to depend on the frequency. In particular, the barrier height at 200 kHz was found to be 0.65 eV, which was similar to the flat band barrier height of 0.66 eV.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.238-242
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• 2001

In this paper, the current-voltage characteristics of a 4H-SiC MESFET is simulated by using the Atlas Simulation tool. we are able to use the simulator to extract more information about the new material 4H-SiC, including the mobility, velocity-field Curve and the Schottky barrier height. We have enabled and used the new simulator to investigate breakdown Voltage and thus predict operation limitiations of 4H-SiC device. Modeling results indicate that the Breakdown Voltage is 197 V and Current is 100 mA

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.238-242
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• 2001

In this paper, the current-voltage characteristics of a 4H-SiC MESFET is simulated by using the Atlas Simulation tool. we are able to use the simulator to extract more information about the new material 4H-SiC, including the mobility, velocity-field Curve and the Schottky barrier height. We have enabled and used the new simulator to investigate breakdown Voltage and thus predict operation limitations of 4H-SiC device. Modeling results indicate that the Breakdown Voltage is 197 V and Current is 100 mA