• 전자공학회논문지 IE
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• v.46 no.4
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• pp.8-15
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• 2009

In this paper, we are indicated CMOS Image sensor circuit SPICE analysis for the Photo Diode and pixel Modeling. We get a characteristic of the photoelectric current using a device simulator Medici and develop the Photodiode model for applying a SPICE simulation. For verifying the result, We compared the result of SPICE simulation with the result of mixed mode simulation about the testing circuit structure consisted photodiode and NMOS.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.2
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• pp.38-45
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• 2000

In this paper, an approach of modeling the optical interconnection system by SPICE simulation is presented. SPICE simulations with equivalent circuit models for optical devices are performed in a stable manner. From the simulated results, eye diagrams for receiver output and BER are obtained. Timing jitter due to laser diode turn-on delay effects can be found under various bias conditions. Using this approach, various system parameters such as bit rate, BER, dissipated transmitter power, and bias conditions can be optimized. It is expected that this approach will find useful applications such as Gigabit Ethernet and ATM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.25-35
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• 2001

In order to analyze the electrical characteristics of complicated thin film transistor-liquid crystal display (TFT-LCD) array circuits, it is indispensible to use simulation programs such as PSPICE and AIM-SPICE. In this paper, we present a systematic method of extracting the input parameters of poly-Si TFT for SPICE simulations. This method was applied to two different types of poly-Si TFTs, fabricated by excimer laser annealing and silicide mediated crystallization methods, and yielded good fitting results to experimental data. Among the SPICE simulators, PSPICE has the graphic user interface feature making the composition of complicated circuits easier. We added successfully a poly-Si TFT device model to the PSPICE simulator, and analyzed easily the electrical characteristics of pixels considering the line RC delay. The results of this work would contribute to efficient simulations of poly-Si TFT-LCD arrays.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.7-12
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• 2010

We have developed a SPICE compatible model of thermoelectric devices, and a parameter extracting technique only by electrical and temperature measurement by using Harman method was proposed. The proposed model and parameter extraction technique do not require experimental data from thermal conductivity measurements. The maximum error between extracted parameters extracted by proposed method and conventional method was about 14%, which is not a severe mismatch for real application. The proposed model is applicable to design of both for thermoelectric coolers and thermo electric generators.

• Journal of Sensor Science and Technology
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• v.10 no.2
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• pp.142-147
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• 2001

Using transmission-line equivalent circuit based on cross-field model for an interdigital acoustic wave transducer, an efficient simulation technique of SAW filters by SPICE is proposed. Propagation of surface acoustic wave is modeled as transmission line so that frequency-dependent circuit elements are not needed in the equivalent circuit of an interdigital transducer. Because the equivalent circuits for frequency-dependent circuit elements are not derived approximately, and a small number of circuit elements are used in the equivalent circuit for filters, simulation time is much reduced. The utility of the proposed technique is demonstrated through simulation for the characteristics of SAW filters such as insertion loss, input admittance, passband ripple, and harmonic frequency response.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.200-201
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• 2017

This paper introduces the SPICE simulation results of 3D sequential inverter considering electrical coupling. TCAD data and the SPICE data are compared to verify that the electrical coupling is well considered by using BSIM-IMG for the upper NMOS and LETI-UTSOI model for the lower PMOS. When inter layer dielectric is small, it is confirmed that electrical coupling is well reflected in the top transistor $I_{ds}-V_{gs}$ characteristics according to the change of the bottom transistor gate voltage.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.230-232
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• 2006

본 논문은 Spice해석을 이용하여 push-pull inverter 방식의 전자식 안정기회로를 해석하고 안정기를 설계 제작하였다. Spice 시뮬레이션을 사용함으로서 전자식 안정기의 설계에 있어서 전기적 특성을 예측, 평가 할 수 있었고 이를 바탕으로 145W저압 UV램프용 전자식 안정기를 개발하였다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.4
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• pp.8-14
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• 2004

In this paper, We designed the electronic ballast power factor corrected(PFC) circuity for an 400[W] hight pressure soldium lamp using boost-converter. The values of PFC elements in the proposed boost-converter circuit are calculated theoretically and performed simulation using IsSPICE. We also implemented the ballast for high pressure sodium lamp and experiments. We found that the experimental characteristics of implemented PFC circuit were same with those of simulation results. The experimental results show the performance as PF 90.3[%] at output 400(W).

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.54-61
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• 1999

We suggested a macro medel for MOS transistors, which incorporates the distributed substrate resistance by using a method which utilizes external diodes on SPICE MOS model. By fitting the simulated s-parameters to the measures ones, we obtained a model set for the W=200TEX>$\mu\textrm{m}$ and L=0.8TEX>$\mu\textrm{m}$ NMOS transistor, and also analyzed the effects of distributed substrate resistance in the RF range. By comparing the physical parameters calculated from simulated s-parameters such as ac resistances and capacitances with the measured ones, we confirmed the validity of the simulation results. For the frequencies below 10GHz, it seems appropriated to use a simple macro model which utilizes the existing SPICE MOS model with junction diodes, after including one lumped resistor each for gate and substrate nodes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.1-12
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• 2003

In this study, a regime where independent treatment of SETs in transient simulations is valid has been identified quantitatively. It is found that as in the steady-state case, each SET can be treated independently even in the transient case when the interconnection capacitance is large enough. However, the value of the load capacitance $C_{L}$of the interconnections for the independent treatment of SETs is approximately 10 times larger than that of the steady state case. A compact SET transient model is developed for transient circuit simulation by SPICE. The developed model is based on a linearized equivalent circuit and the solution of master equation is done by the programming capabilities of the SmartSpice. Exact delineation of several simulation time scales and the physics-based compact model make it possible to accurately simulate hybrid circuits in the time scales down to several tens of pico seconds. The simulation time is also shown to depend on the complexity level of the transient model.l.