• 제목/요약/키워드: Residual Silicon

검색결과 170건 처리시간 0.024초

The Magnetic Properties of Electrical Steel for Rotating Machine according to the Specimen

  • Choi, Yun-Yong;Chin, Jun-Woo;Hong, Jung-Pyo
    • Journal of Magnetics
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    • 제21권2호
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    • pp.209-214
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    • 2016
  • This paper analyzes the magnetic property according to the machined shape of steel material with non-oriented silicon steel (50PN470/50A470), that is most commonly used in the design of electrical equipment. Toward this end, specimens were produced and divided into Bar-Specimen (Epstein Frame Tester) and Ring-Specimen (Toroidal Ring Tester). The characteristics of the electrical Silicon steel were measured using the instruments solely dedicated to measuring each specimen. The core loss of the Bar-Specimen, which is commonly used, was found to be less than that of the Ring-Specimen. This is a very important design factor in achieving the objectives of improving the product efficiency and predicting the performance of electrical equipment. It serves as a critical point of view in order to reduce the error between design value and product value. A comparative analysis was conducted regarding various characteristics (Hysteresis, B-H characteristic, Iron loss, Minor loop, Coercive force, Residual magnetic flux density, etc.) of the electrical silicon steel considered in the design of the electrical equipment according to the specimen.

고 전력 DMOSFET 응용을 위한 트렌치 게이트 형성에 관한 연구 (A Study on the Formation of Trench Gate for High Power DMOSFET Applications)

  • 박훈수;구진근;이영기
    • 한국전기전자재료학회논문지
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    • 제17권7호
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    • pp.713-717
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    • 2004
  • In this study, the etched trench properties including cross-sectional profile, surface roughness, and crystalline defects were investigated depending on the various silicon etching and additive gases, For the case of HBr$He-O_2SiF_4$ trench etching gas mixtures, the excellent trench profile and minimum defects in the silicon trench were achieved. Due to the residual oxide film grown by the additive oxygen gas, which acts as a protective layer during trench etching, the undercut and defects generation in the trench were suppressed. To improve the electrical characteristics of trench gate, the hydrogen annealing process after trench etching was also adopted. Through the hydrogen annealing, the trench corners might be rounded by the silicon atomic migration at the trench corners having high potential. The rounded trench corner can afford to reduce the gate electric field and grow a uniform gate oxide. As a result, dielectric strength and TDDB characteristics of the hydrogen annealed trench gate oxide were remarkably increased compared to the non-hydrogen annealed one.

SOI 구조 가속도센서의 온도 특성 해석 (Analysis of Temperature Characteristics on Accelerometer using SOI Structure)

  • 손미정;서희돈
    • 센서학회지
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    • 제9권1호
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    • pp.1-8
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    • 2000
  • 최근, 자동차가 점점 고급화 되어감에 따라 자동차엔진과 같이 $200^{\circ}C$ 이상의 고온과 부식적인 환경 하에 사용되어 질 수 있는 고성능의 실리콘 가속도센서의 장착이 기대되고 있다. 그러나 실리콘은 본질적으로 온도의 영향이 큰 물질이고, p-n 접합으로 압저항이 형성되기 때문에 $150^{\circ}C$ 이상이 되면 누설전류가 급격하게 증가하여 센서의 성능을 떨어뜨린다. 본 연구에서는 SOI 구조를 이용한 가속도센서의 온도특성을 해석하고, 유한요소법(finite element method)을 이용하여 감도 온도계수(TCS) 및 오프셋전압 온도계수(TCO)의 열잔류응력과의 관련성을 검토하였다. 그 결과, TCS는 압저항의 불순물 농도를 최적화함으로써 줄일 수 있고, TCO는 압저항의 열잔류응력과 불균일한 공정에 관계가 있다는 것을 알았다. 그리고 센서의 중앙지지구조에 있어서 패키징 열잔류응력의 평균값은 약 $3.7{\times}10^4Nm^{-2}^{\circ}C^{-1}$ 정도로 주변지지구조보다 1/10정도 작게 나타났다.

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나노급 수소화된 비정질 실리콘층 두께에 따른 저온형성 니켈실리사이드의 물성 연구 (Property of Nickel Silicides with Hydrogenated Amorphous Silicon Thickness Prepared by Low Temperature Process)

  • 김종률;최용윤;박종성;송오성
    • 대한금속재료학회지
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    • 제46권11호
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    • pp.762-769
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    • 2008
  • Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

단면 연마된 실리콘 웨이퍼의 열에 의한 휨 거동 (Thermal Warpage Behavior of Single-Side Polished Silicon Wafers)

  • 김준모;구창연;김택수
    • 마이크로전자및패키징학회지
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    • 제27권3호
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    • pp.89-93
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    • 2020
  • 반도체 패키지의 경박단소화로 인해 발생하는 복잡한 휨 거동은 내부 응력을 발생시켜 박리나 균열과 같은 다양한 기계적인 결함을 야기한다. 이에 따른 수율 감소를 막기 위해 휨 거동을 정확하게 예측하려는 노력은 다양한 측면에서 그 접근이 이루어지고 있다. 이 중 패키지를 구성하는 주 재료인 실리콘 웨이퍼는 일반적으로 균질한 물질로 취급되어 열에 의한 휨 거동은 전혀 없는 것으로 묘사된다. 그러나 실리콘을 얇게 가공하기 위해서 진행되는 그라인딩과 폴리싱에 의해 상온에서 휨이 발생한다는 사실이 보고되어 있고, 이는 표면에 형성되는 damage layer가 두께 방향으로 불균질함을 발생시키는 것으로부터 기인한다. 이에 본 논문에서는 반도체 패키징 공정 중 최고온 공정 과정인 solder reflow 온도에서 단면 연마된 웨이퍼가 나타내는 휨 거동을 측정하고, 이러한 휨 량이 나타나는 원인을 연마된 면과 그렇지 않은 면의 열팽창계수를 측정함으로써 밝혀내었다. 측정에는 미세 변형률과 형상이 모두 측정 가능한 3차원 디지털 이미지 상관법(Digital Image Correlation; DIC)을 이용하였다.

실리콘 광도파로, 미소거물 및 접촉식 정 전구동기가 집적된 광스위치 (An Optical Microswitch Integrated with Silicon Waveguides, Micromirrors, and Electrostatic Touch-Down Beam Actuators)

  • 진영현;서경선;조영호;이상신;송기창;부종욱
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제50권12호
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    • pp.639-647
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    • 2001
  • We present an integrated optical microswitch, composed of silicon waveguides, gold-coaled silicon micromirrors, and electrostatic contact actuators, for applications to the optical signal transceivers. For a low switching voltage, we modify the conventional curled electrode microactuator into a electrostatic microactuator with touch-down beams. We fabricate the silicon waveguides and the electrostatically actuated micromirrors using the ICP etching process of SOI wafers. We observe the single mode wave propagation through the silicon waveguide with the measured micromirror loss of $4.18\pm0.25dB$. We analyze major source of the micromirror loss, thereby presenting guidelines for low-loss micromirror designs. From the fabricated microswitch, we measure the switching voltage of 31.74V at the resonant frequency of 6.89kHz. Compared to the conventional microactuator, the present contact microactuator achieves 77.4% reduction of the switching voltage. We also discuss a feasible method to reduce the switching voltage to 10V level by using the electrode insulation layers having the residual stress less than 30MPa.

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공정변수가 p+ 박막의 잔류응력 분포에 미치는 영향 (Effect of Process Parameters on the Residual Stress Distribution in p+ Films)

  • 양의혁;양상식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 C
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    • pp.1437-1439
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    • 1995
  • This paper investigates the effect of thermal oxidation on the profile of the residual stress along the depth of p+ silicon films by quantitative determination method. Two examples for the application of this method illustrate that most of p+ region is subjected to the tensile stress except the region near the front surface and that the stress gradient of the film oxidized at $1100^{\circ}C$ is more steep than that of the film oxidized at $1000^{\circ}C$.

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$Si_3N_4/SM45C$ 접합부의 응력해석 및 파괴특성 (Fracture Characteristics and Stress Analysis of $Si_3N_4/SM45C$ Joint)

  • 김기성
    • 한국공작기계학회:학술대회논문집
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    • 한국공작기계학회 1998년도 추계학술대회 논문집
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    • pp.248-253
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    • 1998
  • Recently, the uses of Ceramic/metal bonded joints, resin/metal joints, adhesive joints, composite materials which are composed of dissimiliar materials have increased in various industry fields. Since the ceramic/metal bonded joints material is made at a high temperature, residual stress distributions due to differences in material properties were investigated by varying material parameters. The two dimensional finite element analysis was performed to study residual stress distribution in Si3N4/SM45C bonded joint with a copper interlayer between the silicon nitride(Si3N4) and the structural carbon steel(SM45C) and 4-point bending tests were carried out under room temperature. Fracture surface and crack propagation path were observed using scanning electron microscope and characteristics of its fracture was discussed.

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고품질 AlN 박막으로 제작한 압전 마이크로스피커 (Piezoelectric Microspeakers Fabricated with High Quality AlN Thin Film)

  • 이승환;정경식;김동기;신광재
    • 전기학회논문지
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    • 제56권8호
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    • pp.1455-1460
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    • 2007
  • This paper reports the piezoelectric microspeakers that are audible in open air with high quality piezoelectric AlN thin film deposited onto Mo/Ti electrode. This successful achievement, compared to the previous results, is followed by manipulating two material properties: the one is to use a compressively stressed silicon nitride film as a supporting diaphragm (even tensile stressed, around +20 MPa) and the another is to use high quality AlN thin film with compressive residual stress (less than -100 MPa). With these materials, the Sound Pressure Level (SPL) of the fabricated micro speakers shows more than 60 dB from 100 Hz to 15 kHz and the highest SPL is about 100 dB at 9.3 kHz with 20 Vpeak-to-peak sinusoidal input and with 10 mm distances from the fabricated micro speakers to the reference microphone (B&K Type 2669 & 4192L).

펄스도금법을 이용한 고내마모성 로듐 도금층 형성에 관한 연구 (Electroplating of High Wear Resistant Rhodium using Pulse Current Plating Method)

  • 이서향;이재호
    • 마이크로전자및패키징학회지
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    • 제26권2호
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    • pp.51-54
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    • 2019
  • 실리콘 기판상에 여러 조건의 전류밀도에서 로듐 도금을 실시하였다. 직류전원의 경우 전류밀도가 증가하면 로듐 표면에 균열이 발생하였다. 잔류응력을 낮추기 위하여 펄스전류를 인가하였다. 펄스전류의 off 시간이 도금층의 잔류응력을 낮추는데 영향을 주었다. 펄스전류의 인가 주기를 5:5로 하였을 경우 균열 없는 로듐 도금층을 얻었다.