• Journal of Information Display
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• v.7 no.1
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• pp.25-29
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• 2006

By the voltage threshold (Vt) close-curve measurement method, the changes in the discharge characteristics such as a firing voltage and IR emission among the three electrodes were examined relative to the low or high panel temperature ranging from -10 to $80^{\circ}$. The variation in the panel temperature was found significantly influence the surface discharge between the MgO surfaces rather than the plate gap discharge between the MgO and phosphor layers. Based on this experimental observation, a modified reset waveform that alleviates the surface discharge during a ramp-up and -down period was deeloped. By adopting the proposed reset waveform, a stable address discharge could be obtained irrespective of the panel temperature variation.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.11
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• pp.536-540
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• 2002

This paper proposes a method to drive an AC plasma display panel(PDP) with a significantly improved contrast ratio. In the proposed method, during the first sub-field of one frame, all PDP cells are reset by the ramp waveform, and during the other sub-field, only the cells turned on in the previous sub-field are reset. No light is emitted during the reset period of every sub-field except the first sub-field. For a 10-bit picture, the luminance of the dark level for the proposed method is 10 times lower than that for the conventional method, in which the ramp waveform for the reset is used in every sub-field. Accordingly, the contrast ratio for the proposed method is 10 times higher than that for the conventional method. For the 10-bit picture, the measured contrast ratio was about 3080:1 for the proposed method and about 285:1 with the conventional method, a result the contrast ratio has been increased in 10.8 times. This result shows that the proposed method can realize an image with high contrast ratio.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.2
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• pp.17-22
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• 2003

The priming discharge characteristic at the reset period in the ADS drive method of PDP was experimentally analyzed in this research. The amount of wall charge accumulated by the discharge and the accumulated time are unrelated to the priming pulse width. The self-erase discharge by excessive wall charge is related to the amount of wall charge by the priming discharge and this is related to space charge generated by the priming discharge. From the experimental result, in the optimized priming condition the plus width is 8$mutextrm{s}$ and the voltage is about 163V. The space charge which helps the self-erase discharge exists during about 16$mutextrm{s}$ immediately after generating the priming discharge. Therefore, it is suitable within 16$mutextrm{s}$ of the priming pluse width for the effective reset process.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.57-60
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• 2002

This paper deals with the effect of ramp-type erase pulse waveform on the high temperature driving characteristics of ac PDP driven by ramp up-down reset waveform. The experimental results show that the discharge characteristics in the reset period are significantly affected by the erase pulse waveform and ambient temperature. The firing voltage is increased with ambient temperature. This can cause misfirings during the sustain period and should be avoided. As one of possible solutions, we propose the optimization of erasing pulse shape.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.121-122
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• 2000

The understanding of reset scheme is essential for the driving of AC PDP (Plasma Display Panel). The characteristics of reset period of AC PDP was examined with the variation of pulse time and voltage in the ADS (Address Display Separated) driving method presented by Fujitsu,. The addressing characteristics showed drastic change as a function of the erasing time and addressing pulse width. In this paper, these results were explained by the change of wall charge variation, and it was estimated with the currents through each electrode.

• Journal of the Korea Institute of Military Science and Technology
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• v.9 no.4
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• pp.71-80
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• 2006

Strapdown Inertial navigation systems consist of an inertial sensor assembly(ISA), electronic modules to process sensor data, and a navigation computer to calculate attitude, velocity and position. In the ISA, most gryoscopes such as RLGs and FOGs, have digital output, but typical accelerometers use current as an analog output. For a high precision inertial navigation system, sufficient stability and resolution of the accelerometer board converting the analog accelerometer output into digital data needs to be guaranteed. To achieve this precision, the asymmetric error and A/D reset scale error of the accelerometer board must be properly compensated. If the relation between the acceleration error and the errors of boards are exactly known, the compensation and estimation techniques for the errors may be well developed. However, the A/D Reset scale error consists of a pulse-train type term with a period inversely proportional to an input acceleration additional to a proportional term, which makes it difficult to estimate. In this paper, the effects on the acceleration output for auto-pilot situations and the effects of A/D reset scale errors during horizontal alignment are qualitatively analyzed. The result can be applied to the development of the real-time compensation technique for A/D reset scale error and the derivation of the design parameters for accelerometer board.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.10
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• pp.916-922
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• 2008

AC PDP with MgO protective layer coated with the optimum evaporation rate of $5{\AA}/s$ can generate more enhanced efficiency through the vacuum in-line sealing process. However, the optimized process conditions still require the optimum driving scheme on the ramp-up and ramp-down slope of the reset waveform for enhancing the efficiency. In this paper, for the in-situ vacuum sealed PDP with the optimum evaporation rate of MgO protective layer, the address delay time was investigated with various slopes of ramp waveform during a reset ramp-up and ramp-down period. In this study, the minimum statistical delay time was obtained at the ramp-up rate of $6.0 V/{\mu}s$ and the ramp-down rate of $0.7 V/{\mu}s$ of the reset waveform.

• Journal of Climate Change Research
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• v.6 no.3
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• pp.203-208
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• 2015

This study was conducted to provide the agricultural climatological basic data for the reset of sowing period of the winter crop on the double cropping system with rice. During the past 30 years from 1981 to 2010, mean air temperature has risen by $0.45^{\circ}C$ per 10 years (with statistical significance), while precipitation has decreased by 6.74 mm per 10 years and the numbers of days for precipitation has reduced by 0.23 days per 10 years (with no statistical significance) in the sowing period ($1^{st}$ Oct. to $5^{th}$ Nov.) of winter crop. It was analyzed that double cropping system of rice and winter crops need to be reset in the way of delaying the sowing time of winter crops, because rising trend of temperature was clear while variability of precipitation was great and the trend was not clear in the sowing period of winter crops. We have also analyzed the meteorological features of the sowing period of winter crops in 2014, and found that mean air temperature in 2014 was higher than that in normal years (similar to recent temperature change feature) while precipitation in 2014 was much more frequent than that in normal years (unlike recent precipitation features). Such tendency in 2014 made the sowing of winter crops difficult because mechanical sowing could not be worked in flooded paddy fields. Heavy rain in October 2014 was also analyzed as a rare phenomenon.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.6
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• pp.27-33
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• 2002

This paper proposes a method to drive an AC plasma display panel(PDP) with a significantly improved contrast ratio. In the proposed method, during the first sub-field of one frame, all PDP cells are reset by the ramp waveform, and during the other sub-fields, only the cells turned on in the previous sub-field are reset. No light is emitted during the reset period of every sub-field except the first sub-field. For a 10-bit picture, the luminance of the dark level for the proposed method is 10 times lower than that for the conventional method, in which the ramp waveform for the reset is used in every sub-field. Accordingly, the contrast ratio for the proposed method is 10 times higher than that for the conventional method. For the 10-bit picture, the measured contrast ratio was about 3080:1 for the proposed method and about 285:1 for the conventional method, resulting in 10.8 times increase in the contrast ratio. This result shows that the proposed method can realize an image with high contrast ratio.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.3
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• pp.53-59
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• 1994

A new fully differential sample-and-hold circuit which can effectively compensate the offset voltage of an operational amplifier and the charge injection of a MOS switch is presented. The proposed circuit shows a true sample-and-hold function without a reset period or an input-track period. The prototype fabricated using a 1.2$\mu$m double-polysilicon CMOS process occupies an area of 550$\mu$m$\times$288$\mu$m and the error of the sampled ouput is 0.056% on average for 3V input at DC.