• Journal of Information Display
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• 제7권1호
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• pp.25-29
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• 2006

By the voltage threshold (Vt) close-curve measurement method, the changes in the discharge characteristics such as a firing voltage and IR emission among the three electrodes were examined relative to the low or high panel temperature ranging from -10 to $80^{\circ}$. The variation in the panel temperature was found significantly influence the surface discharge between the MgO surfaces rather than the plate gap discharge between the MgO and phosphor layers. Based on this experimental observation, a modified reset waveform that alleviates the surface discharge during a ramp-up and -down period was deeloped. By adopting the proposed reset waveform, a stable address discharge could be obtained irrespective of the panel temperature variation.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권11호
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• pp.536-540
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• 2002

This paper proposes a method to drive an AC plasma display panel(PDP) with a significantly improved contrast ratio. In the proposed method, during the first sub-field of one frame, all PDP cells are reset by the ramp waveform, and during the other sub-field, only the cells turned on in the previous sub-field are reset. No light is emitted during the reset period of every sub-field except the first sub-field. For a 10-bit picture, the luminance of the dark level for the proposed method is 10 times lower than that for the conventional method, in which the ramp waveform for the reset is used in every sub-field. Accordingly, the contrast ratio for the proposed method is 10 times higher than that for the conventional method. For the 10-bit picture, the measured contrast ratio was about 3080:1 for the proposed method and about 285:1 with the conventional method, a result the contrast ratio has been increased in 10.8 times. This result shows that the proposed method can realize an image with high contrast ratio.

• 조명전기설비학회논문지
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• 제17권2호
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• pp.17-22
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• 2003

본 연구에서는 mP의 ADS 구동방식에서 초기화기간의 프라이밍 방전 특성에 대하여 실험적인 해석을 하였다. 방전에 의해 축적되는 벽전하의 총량과 벽전하가 축적되는 시간은 프라이밍 펄스의 폭과 무관하다. 또한 과잉 벽전하에 의한 자기소거 방전은 프라이밍 방전에 의한 벽전하량과 관계가 있으며 또한 프라이밍 방전에 의해 생성되는 공간전하와도 관계가 있다. 실험결과 프라이밍 펄스 폭은 8[$\mu\textrm{s}$], 전압은 163[V] 정도가 최적이다. 그리고 자기소거방전을 돕는 공간전하는 파라이밍 방전이 발생한 직후로부터 약 16[$\mu\textrm{s}$] 동안 존재한다. 그러므로 효과적인 초기화 과정을 위한 프라이밍 펄스의 폭은 16[$\mu\textrm{s}$] 이내가 적당하다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.57-60
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• 2002

This paper deals with the effect of ramp-type erase pulse waveform on the high temperature driving characteristics of ac PDP driven by ramp up-down reset waveform. The experimental results show that the discharge characteristics in the reset period are significantly affected by the erase pulse waveform and ambient temperature. The firing voltage is increased with ambient temperature. This can cause misfirings during the sustain period and should be avoided. As one of possible solutions, we propose the optimization of erasing pulse shape.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.121-122
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• 2000

The understanding of reset scheme is essential for the driving of AC PDP (Plasma Display Panel). The characteristics of reset period of AC PDP was examined with the variation of pulse time and voltage in the ADS (Address Display Separated) driving method presented by Fujitsu,. The addressing characteristics showed drastic change as a function of the erasing time and addressing pulse width. In this paper, these results were explained by the change of wall charge variation, and it was estimated with the currents through each electrode.

• 한국군사과학기술학회지
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• 제9권4호
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• pp.71-80
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• 2006

Strapdown Inertial navigation systems consist of an inertial sensor assembly(ISA), electronic modules to process sensor data, and a navigation computer to calculate attitude, velocity and position. In the ISA, most gryoscopes such as RLGs and FOGs, have digital output, but typical accelerometers use current as an analog output. For a high precision inertial navigation system, sufficient stability and resolution of the accelerometer board converting the analog accelerometer output into digital data needs to be guaranteed. To achieve this precision, the asymmetric error and A/D reset scale error of the accelerometer board must be properly compensated. If the relation between the acceleration error and the errors of boards are exactly known, the compensation and estimation techniques for the errors may be well developed. However, the A/D Reset scale error consists of a pulse-train type term with a period inversely proportional to an input acceleration additional to a proportional term, which makes it difficult to estimate. In this paper, the effects on the acceleration output for auto-pilot situations and the effects of A/D reset scale errors during horizontal alignment are qualitatively analyzed. The result can be applied to the development of the real-time compensation technique for A/D reset scale error and the derivation of the design parameters for accelerometer board.

• 한국전기전자재료학회논문지
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• 제21권10호
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• pp.916-922
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• 2008

AC PDP with MgO protective layer coated with the optimum evaporation rate of $5{\AA}/s$ can generate more enhanced efficiency through the vacuum in-line sealing process. However, the optimized process conditions still require the optimum driving scheme on the ramp-up and ramp-down slope of the reset waveform for enhancing the efficiency. In this paper, for the in-situ vacuum sealed PDP with the optimum evaporation rate of MgO protective layer, the address delay time was investigated with various slopes of ramp waveform during a reset ramp-up and ramp-down period. In this study, the minimum statistical delay time was obtained at the ramp-up rate of $6.0 V/{\mu}s$ and the ramp-down rate of $0.7 V/{\mu}s$ of the reset waveform.

• 한국기후변화학회지
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• 제6권3호
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• pp.203-208
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• 2015

This study was conducted to provide the agricultural climatological basic data for the reset of sowing period of the winter crop on the double cropping system with rice. During the past 30 years from 1981 to 2010, mean air temperature has risen by $0.45^{\circ}C$ per 10 years (with statistical significance), while precipitation has decreased by 6.74 mm per 10 years and the numbers of days for precipitation has reduced by 0.23 days per 10 years (with no statistical significance) in the sowing period ($1^{st}$ Oct. to $5^{th}$ Nov.) of winter crop. It was analyzed that double cropping system of rice and winter crops need to be reset in the way of delaying the sowing time of winter crops, because rising trend of temperature was clear while variability of precipitation was great and the trend was not clear in the sowing period of winter crops. We have also analyzed the meteorological features of the sowing period of winter crops in 2014, and found that mean air temperature in 2014 was higher than that in normal years (similar to recent temperature change feature) while precipitation in 2014 was much more frequent than that in normal years (unlike recent precipitation features). Such tendency in 2014 made the sowing of winter crops difficult because mechanical sowing could not be worked in flooded paddy fields. Heavy rain in October 2014 was also analyzed as a rare phenomenon.

• 전자공학회논문지SC
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• 제39권6호
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• pp.27-33
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• 2002

본 논문에서는 종래의 한 프레임 내에서 매 서브필드마다 리셋구간에 램프파를 인가하던 구동 방식에서 한 프레임 내에 첫 번째 서브필드의 리셋구간에만 램프파를 인가하고, 나머지 서브필드에서는 유지방전을 실행한 셀 들만 초기화하여 고콘트라스트를 실현시킨 구동 파형에 대해 연구하였다. 실험결과 첫 번째 서브필드에서의 리셋구간에서만 램프파에 의해 광이 출력되고, 나머지 서브필드의 리셋구간에서는 광이 출력되지 않음을 확인하였다. 이것은 한 프레임 내에 10개의 서브필드를 사용할 때 종래의 구동 파형에 비해 어두운 화면에서 Background 휘도가 약 10배정도 낮음을 보여준다. 그리고 종래의 구동 파형에서 측정된 285:1의 콘트라스트 비율과 본 논문에서 사용한 구동 파형에 대해 측정한 3080:1의 콘트라스트 비율을 비교했을 때 약 10.8배정도 높아졌으며, 이로 인해 고콘트라스트를 실현시켰다.

• 전자공학회논문지B
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• 제31B권3호
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• pp.53-59
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• 1994

A new fully differential sample-and-hold circuit which can effectively compensate the offset voltage of an operational amplifier and the charge injection of a MOS switch is presented. The proposed circuit shows a true sample-and-hold function without a reset period or an input-track period. The prototype fabricated using a 1.2$\mu$m double-polysilicon CMOS process occupies an area of 550$\mu$m$\times$288$\mu$m and the error of the sampled ouput is 0.056% on average for 3V input at DC.