• Asian Pacific Journal of Cancer Prevention
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• v.13 no.5
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• pp.2335-2338
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• 2012

Objective: To evaluate several metabolic changes in patients with differentiated thyroid carcinoma (DTC ) which enhance cardiovascular risk in the western region of Nepal. Materials and Methods: This hospital based case control study was carried out using data retrieved from the register maintained in the Department of Biochemistry of the Manipal Teaching Hospital, Pokhara, Nepal between $1^{st}$ January, 2009 and $31^{st}$ December, 2011. The variables collected were age, gender, BMI, glucose, insulin, HbA1C, CRP, fibrinogen, total cholesterol, triglycerides, HDL, LDL, VLDL, f-T3, f-T4, TSH. One way ANOVA was used to examine statistical significance of differences between groups, along with the Post Hoc test LSD for comparison of means. Results: fT3 values were markedly raised in DTC cases ($5.7{\pm}SD1.4$) when compared to controls ($2.2{\pm}SD0.9$). Similarly, fT4 values were also moderately raised in cases of DTC ($4.9{\pm}SD1.3$ and $1.7{\pm}SD0.9$). In contrast, TSH values were lowered in DTC cases ($0.39{\pm}SD0.4$) when compared to controls ($4.2{\pm}SD1.4$). Mean blood glucose levels were decreased while insulin was increased and HDL reduced ($39.5{\pm}SD4.7$ as compared to the control $43.1{\pm}SD2.2$). Conclusion: Cardiovascular risk may be aggravated by insulin resistance, a hypercoagulable state, and an atherogenic lipid profile in patients with differentiated thyroid cancer.

• Journal of Korean Medicine for Obesity Research
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• v.19 no.2
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• pp.119-136
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• 2019

Objectives: People often fail to maintain their weight even though they have succeeded in weight loss. The purpose of this study was to review previously published study results with regards to the predictive factors associated with weight loss maintenance after successful weight loss. Methods: The authors searched for the articles related to weight loss maintenance after successful weight loss, published up until June 2019 on PubMed, Cochrane Central Register of Controlled Trials (CENTRAL), Embase, Research Information Sharing Service (RISS), and Koreanstudies Information Service System (KISS). A total of 76 articles were finally selected. From the study results, changeable and unchangeable predictors were extracted, and these predictors were examined according to detailed categories. Results: The changeable predictors of weight loss maintenance included behavioral factors, psychological factors and treatment process-related factors, whereas the unchangeable predictors included genetic and physiological factors, demographic factors, history of treatment on obesity-related factors. The main factors of weight loss maintenance were changeable predictors such as healthy eating habits, dietary intake control, binge eating control, regular exercise and physical activity, depression and stress control, social supports, self-regulation, self-weighing and initial weight loss and unchangeable predictors such as low initial weight and maximum lifetime weight. Conclusions: The results of our review results suggest that changeable and unchangeable predictors of weight loss maintenance should be carefully examined during treatments of obesity.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2022.06a
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• pp.339-343
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• 2022

In this study, a method for simplifying the structure of the VDES RF receiver, and the gain control method of the receiver to comply with the international standard in this structure was described. The input level of the wanted signal and unwanted signal to the receiver was defined, and when the two signals were input, the saturation state at the ADC was checked at the receiver output. As a result of the simulation by the circuit simulator, it was satisfied that the output power of the receiver was in the SFDR region of ADC with respect to the adjacent channel interference ratio, intermodulation, and blocking level. Through this study, it was found that the structure of th proposed RF receiver conforms to the international standard.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.1016-1021
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• 2003

The overall size of electronic product is becoming small according to development of technology. Accordingly it is difficult to inspect these small components by human eyes. So, an automation system for inspecting them has been used. The existing system put microprocessor or Programmable Logic Controller (PLC) use. The structure of microprocessor-based controller and PLC use basically composed of memory devices such as ROM, RAM and I/O ports. Accordingly, the system is not only becomes complicated and enlarged but also higher price. In this paper, we implement FPGA-based One-chip Programmable Timing Controller for Inspecting Small components to resolve above problems and design the high performance controller by using VHDL. With fast development, the FPGA of high capacity that can have memory and PLL have been introduced. By using the high-capacity FPGA, the peripherals of the existent controller, such as memory, I/O ports can be implemented in one FPGA. By doing this, because the complicated system can be simplified, the noise and power dissipation problems can be minimized and it can have the advantage in price. Since the proposed controller is organized to have internal register, counter, and software routines for generating timing signals, users do not have to problem the details about timing signals and need to only send some values about an inspection system through an RS232C port. By selecting theses values appropriate for a given inspection system, desired timing signals can be generated.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.183-188
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• 2015

A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with $0.18{\mu}m$ complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.17-26
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• 1999

In this paper, Bit selectable and Bi-directional Interface Device is described, which can communicate data with the peripheral devices. Specially, an algorithm of truth-table comparison that synthesizes the pulse-type sequential circuit pulse has been proposed to design the Interrupt Generator, and implemented in designing the Interrupt Register. Also, a description of the asynchronous design method is given to remove the clock skew phenomenon, and the output asynchronous control method which finds the optimal clock and controls all the enable signal of the output pins at the same time is presented. Using this technique interface ports have delay time of less-than 0.7ns.

• Proceedings of the Korean Society of Near Infrared Spectroscopy Conference
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• 2001.06a
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• pp.4114-4114
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• 2001

For the quality control of tablets several parameters have to be checked. The most important one is the content of an active ingredient which has to match a narrow range around the designated content. The only useful measurement mode is transmission which provides information of the complete tablet. A measurement in diffuse reflectance would register only the surface which is useless especially in case of a coated tablet. In this work tablets for a clinical study (placebo/verum studies) with very low concentrations of the active ingredient were measured. The concentration range was 0 to 6 mg with a total weight of the tablets of 105 mg, leading to a highest concentration of the active component of 5.7% by weight. Especially the spectroscopic distinction between the placebo and the low dosage forms with 0.25 and 0.5 mg active agent requires an extraordinarily accurate sampling technique. Using the VECTOR 22/N-T in transmission mode allows the collection of the information from the complete tablets. A quantitative PLS-model with transmission spectra from the tablets described above shows that the active substance can be predicted with a RMSECV (root mean square error of cross validation) of 0.04% absolute for this special application. The results are compared with those of measurements in diffuse reflectance using different accessories.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.9 no.3
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• pp.85-93
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• 2010

This paper proposes a new dynamic hardware allocation and binding algorithm of a simultaneous allocation and binding for SOC design automation. The proposed algorithm works on scheduled input graph and simultaneously allocates binds functional units, interconnections and registers by considering interdependency between operations and storage elements in each control step, in order to share registers and interconnections connected to functional units, as much as possible. This paper shows the effectiveness of the proposed algorithm by comparing experiments to determine number of function unit in advance or by comparing separated executing allocation and binding of existing system.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.7
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• pp.38-50
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• 1997

This paper concerns a VHDL design and simulation of an accurate and cost-effective fuzzy logic controller (FLC). The accurcy of the proposed FLC is obtained by using the center of gravity (COG) defuzzifier that considers both membership values and spans of membership functions in calculating a crisp value. The cost-effectiveness of the proposed FLC is obtained by restructuring the conventional FLC in the following ways: Firstly, the MAX-MIN inference is inference is replaced by a read-modify-write operation that can be implemented economically in the structure of register files. Secondly, the division in the COG defuzzifier is avoided by finding the moment equilibrium point. The proposed COG defuzzifier has two disadvantages that it requires additional multipliers and it takes a lot of computation time to find the moment equilibrium point. The first disadvantage is overcome by replacing the mulitpliers with stochastic AND operations and the second disadvantage is alleviated by using a coarse-to-fine searching algorithm. The proposed FLC is described in VHDL structurally and behaviorally and whether it is working well or not is checked on SYNOPSYS VHDL simulator by using the truck backer-upper control problem.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.8
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• pp.1283-1291
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• 2002

In this paper, the PLL driven by the DDFS is designed on the schematic using the Q-logic cell based library and is implemented using FPGA QL32 x16B. The measurement results of the frequency synthesizer switching speed were agreement with a register. The simulated results show that the clock delay was generated after eleven clock and if input is random, It has influence on output DA converter has to be very extensive. Therefore, the DDFS used noise shaper to drive PLL by regular interval for input state. Also the bandwidth of DA converter very extensive, the simulation shows that the variation of small input control word is better than the switching speed of PLL.