• Journal of Power Electronics
• /
• v.14 no.6
• /
• pp.1224-1232
• /
• 2014

A full-bridge secondary dual-resonant DC-DC converter using the asymmetrical pulse-width modulated (APWM) strategy is proposed in this paper. The proposed converter achieves zero-voltage switching for the power switches and zero-current switching for the rectifier diodes in the whole load range without the help of any auxiliary circuit. Given the use of the APWM strategy, a circulating current that exists in a traditional phase-shift full-bridge converter is eliminated. The voltage stress of secondary rectifier diodes in the proposed converter is also clamped to the output voltage. Thus, the existing voltage oscillation of diodes in traditional PSFB converters is eliminated. This paper presents the circuit configuration of the proposed converter and analyzes its operating principle. Experimental results of a 1 kW 385 V/48 V prototype are presented to verify the analysis results of the proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.39 no.6
• /
• pp.545-556
• /
• 1990

A design method of a current source using 12-pulse phase-controlled rectifier (PCR) is presented. The critical inductance of the 12-pulse PCR is derived and it is shown that the critical inductance can be reduced using a current source. The control circuit of the 12-pulse PCR with an inner fast dynamic loop is proposed to give the frequency synchronism and to reduce the subharmonics due to the unbalance of the transformer of the power line. This circuit is analyzed and its dynamic loop is optimized. The optimal constant PIMF (proportional, integral and measurable variable feedback, and feedforware) controller is also designed using the time-weighted quadratic performance index. It is shown via experimental results that the proposed design method gives high dynamic and static performance of the current source using the 12-pulse PCR.

• Proceedings of the KIEE Conference
• /
• 2000.07b
• /
• pp.1306-1308
• /
• 2000

A new ZVT PFC for using 3[KW] power amplifier is proposed. Generally, the single phase diode rectifier has been widely used in the SMPS of the conventional power amplifier. But this rectifier has occurred some problems which are the input power factor and current harmonics. To solve the above problems, in this paper, two topology is adopted. The one is the boost type PFC for improving the input power factor. The other is the ZVT resonant circuit for reducing the switching loss and stress. In this paper, the proposed topology is analyze designed to built the ZVT PFC for using 3[KW] power amplifier. In order to verify the circuit va finally, the PSPICE simulation and experiment results are presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07a
• /
• pp.373-376
• /
• 2004

전력전자 회로의 고속화에 따라 정류기의 역할은 점차 중요해지고 있다. 전원장치의 compact화 및 초소형화에 따라 스위칭 주파수는 높아지고 있다. 최근 전원장치의 on-line 뿐만 아니라 off-line에서의 효율을 향상시키려면 도통손실 및 스위칭 손실을 최소화를 요구받고 있다. 스위칭 주파수가 증가함에 따라 power rectifier는 도전 및 스위칭 손실의 최소화를 위해서는 스위칭 손실의 주된 원인인 역회복 특성을 잘 파악해야 한다. 이를 위해 본 고에서는 최근 제작된 SiC SBD의 역회복 특성을 분석을 위한 $t_{rr}$, 측정을 위한 $t_{rr}$ Tester를 MIL-STD-750-4031.4에 참고하여 제작하였으며, 제작된 $t_{rr}$ Tester를 이용하여 SiC SBD의 $t_{rr}$의 측정결과에 대해 기술하였다.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.23 no.6
• /
• pp.389-396
• /
• 2018

This study proposes a control method using a repetitive controller for a boost-type PFC rectifier with an APD circuit structure to improve the current distortion caused by DCM condition. Conventional proportional integral controllers have bandwidth limitations in DCM conditions. The performance improvement of the APD controller in the DCM region is verified through simulations and experiments on the compensation of harmonics by the repetitive controller.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.6
• /
• pp.10-15
• /
• 2008

In this paper, a new NMOS gate cross-connected current-mirror type bridge rectifier for UHF RFID applications is presented. The DC converting characteristics of the proposed rectifier are analyzed with the high frequency equivalent circuit and the gate capacitance reduction technique for reducing the gate leakage current due to the increasing of operating frequency is also proposed theoretically by circuitry method. As the results, the proposed rectifier shows nearly same DC output voltages as the existing NMOS gate cross-connected rectifier, but it shows the gate leakage current reduced to less than 1/4 and the power consumption reduced more than 30% at the load resistor, and it shows more stable DC supply voltages for the valiance of load resistance. In addition, the proposed rectifier shows high enough and well-rectified DC voltages for the frequency range of 13.56MHz HF(for ISO 18000-3), 915MHz UHF(for ISO 18000-6), and 2.45 GHz microwave(for ISO 18000-4). Therefore, the proposed rectifier can be used as a general purpose one to drive RFID transponder chips on various RFID systems which use specified frequencies.

• Proceedings of the IEEK Conference
• /
• 2003.07c
• /
• pp.2935-2938
• /
• 2003

A new Valley-fill circuit for improving PF(power factor) is proposed in this paper. The proposed topology combines Valley-fill rectifier and an additional inductor for boosting. In the proposed circuit, a shapc of input current is related to the PWM duty cycle. The boosting inductor makes improve PF by the electric charge transfer action. The operation principle and the shape of input current arc analyzed as applied the boosting inductor. The optimum value of boosting inductor is determined. A 100W single-stage converter has been designed and tested. Experimental results are presented to verify the validity of the proposed converter.

• Proceedings of the KIEE Conference
• /
• 2005.04a
• /
• pp.176-179
• /
• 2005

This paper proposed the two-transistor forward circuit using PFC, lossless snubber and synchronous rectifier for low voltage and high current output. The principle of operation, feature and design considerations is illustrated and verified through the experiment with a 200W(5V, 40A) 100kHz MOSFET based experimental circuit.

• Journal of IKEEE
• /
• v.19 no.2
• /
• pp.265-270
• /
• 2015

In this paper, we proposed a dual-directional SCR (silicon-controlled rectifier) based ESD (electrostatic discharge) protection circuit. In comparison with conventional SCR, this ESD protection circuit can provide an effective protection against ESD pulses in the two opposite directions, so the ESD protection circuit can be discharged in two opposite direction. The proposed circuit has a higher holding voltage characteristic than conventional SCR. These characteristic enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. it was analyzed to figure out electrical characteristics in term of individual design parameters. They are investigated by using the Synopsys TCAD simulator. In the simulation results, it has trigger voltage of 6.5V and holding voltage increased with different design parameters. The holding voltage of the proposed circuit changes from 2.1V to 6.3V and the proposed circuit has symmetrical I-V characteristic for positive and negative ESD pulse.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 1997.10a
• /
• pp.11-13
• /
• 1997

Abstract - An electronic starter using MOSFET has been designed to take advantage of ideal preheating and starting features which can extend the lifetime of fluorescent lamps. The preheating circuit of the developed electronic starter is consisted of four parts - afull-wave rectifier circuit, an FET switching circuit a timer circuit for the gate switching, and a circuit for end-of-life protection. The circuit is analyzed by using PSpice simulation, and is improved to give an appropriate starting-time through control of R-C time constant of the timer circuit. And the circuit is also provided with an end-of-life protection feature, which utilizes the negative resistance characteristics of a thermistor that is thermally linked to FET through a heatsink. This also protects the FET from any overheating problems. From the results of simulation it is possible to obtain an appropriate value on the starting time for proper ignition and also it is verified that the limit for resistance of the thermistor is dependant on the value of resistance is the timer circuit