• 한국전기전자재료학회논문지
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• 제16권8호
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• pp.657-662
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• 2003

This paper presents a new fabrication method of selective SiGe epitaxial growth at 650 $^{\circ}C$ on (100) silicon wafer with oxide patterns by reduced pressure chemical vapor deposition. The new method is characterized by a cyclic process, which is composed of two parts: initially, selective SiGe epitaxy layer is grown on exposed bare silicon during a short incubation time by SiH$_4$/GeH$_4$/HCl/H$_2$system and followed etching step is achieved to remove the SiGe nuclei on oxide by HCl/H$_2$system without source gas flow. As a result, we noted that the addition of HCl serves not only to reduce the growth rate on bare Si, but also to suppress the nucleation on SiO$_2$. In addition, we confirmed that the incubation period is regenerated after etching step, so it is possible to grow thick SiGe epitaxial layer sustaining the selectivity. The effect of the addition of HCl and dopants incorporation was investigated.

• IEIE Transactions on Smart Processing and Computing
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• 제3권5호
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• pp.331-337
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• 2014

Ge is becoming an increasingly popular semiconductor material with high Si compatibility for on-chip optical interconnect technology. For a better manifestation of the meritorious material properties of Ge, its surface treatment should be performed satisfactorily before the electronic and photonic components are fabricated. Ex-situ rapid thermal annealing (RTA) processes with different gases were carried out to examine the effects of the annealing gases on the thin-film quality of Ge grown epitaxially on Si substrates. The Ge-on-Si samples were prepared in different structures using the same equipment, reduced-pressure chemical vapor deposition (RPCVD), and the samples annealed in $N_2$, forming gas (FG), and $O_2$ were compared with the unannealed (deposited and only cleaned) samples to confirm the improvements in Ge quality. To evaluate the thin-film quality, room-temperature photoluminescence (PL) measurements were performed. Among the compared samples, the $O_2$-annealed samples showed the strongest PL signals, regardless of the sample structures, which shows that ex-situ RTA in the $O_2$ environment would be an effective technique for the surface treatment of Ge in fabricating Ge devices for optical computing systems.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.182-185
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• 2002

자기정렬구조의 실리콘-게르마늄 이종접합 트랜지스터에서 $f_{max}$를 높이기 위한 방안으로 베이스의 저항 값을 감소시키고자 외부 베이스에 실리콘 및 실리콘-게르마늄 박막을 저온에서 선택적으로 성장할 수 있는 방법을 연구하였다. RPCVD를 이용하여 $SiH_{2}Cl_{2}$과 $GeH_{4}$를 소스 가스로 하고 HCI을 첨가하여 선택성을 향상시킴으로써 $675\sim725^{\circ}C$의 저온에서도 실리콘 및 실리콘-게르마늄의 선택적 에피성장이 가능하였다. 고온 공정에 주로 이용되는 $SiH_{2}Cl_{2}$를 이용한 실리콘 증착은 $675^{\circ}C$에서 열분해가 잘 이루어지지 않고 HCl의 첨가에 의한 식각반응이 동시에 진행되어 실리콘 기판에서도 증착이 진행되지 않으나 $700^{\circ}C$ 이상에서는 HCI을 첨가한 경우에 한해서 선택성이 유지되면서 실리콘의 성장이 이루어졌다, 반면 실리콘-게르마늄막은 실리콘에 비해 열분해 온도가 낮고 GeO를 형성하여 잠입시간을 지연하는 효과가 있는 게르마늄의 특성으로 인해 선택성이나 증착속도 모두에서 유리하였으나 실리사이드 공정시에 표면으로 게르마늄이 석출되는 현상 등의 저항성분이 크게 작용하여 실리콘-게르마늄막 만으로는 외부 베이스에의 적용은 적절하지 않았다. 그러나 실리콘막을 실리콘-게르마늄막 위에 Cap 층으로 증착하거나 실리콘막 만으로 외부 베이스에 선택적으로 증착하여 베이스의 저항을 70% 가량 감소시킬 수 있었다.

• 한국재료학회지
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• 제5권6호
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• pp.706-714
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• 1995

원거리 플라즈마 화학증착법을 이용하여 저온에서 이산화규소박막을 제조하였다. 본 연구 에서는 공정변수인 기판의 온도, 반응기체의 조성 및 분압과 플라즈마 전력에 따른 산화막의 재료적인 물성을 평가하였다. XPS결과에서 산화막은 양론비(O/Si=2)보다 약간 적어 실리콘이 많이 함유된 막으로 나타났다. 이 경우 굴절율과 ESR분석에 의해 미결합된 실리콘의 양이 증가함을 알 수 있었다. SIMS분석에 의해 미량의 질소성분이 계면에 존재하는 것과 실리콘 미결함을 관찰하였다. FT-IR로부터 막내 수소량을 정량화하였으며 결합각 분포는 20$0^{\circ}C$이상에서 열산화막과 비슷한 값을 얻었다. 하지만 열산화막에 비해 높은 식각율을 보여 계면 스트레스에 의해 막내의 결합력이 약해진 것으로 생각된다.

• 한국전기전자재료학회논문지
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• 제16권7호
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• pp.573-578
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• 2003

Low temperature selective epitaxial growth of Si and SiGe has been obtained using an industrial single wafer chemical vapor deposition module operating at reduced pressure. Epitaxial Si and heteroepitaxial SiGe deposition with Ge content about 20 % has been studied as extrinsic base for self-aligned heterojunction bipolar transistors(HBTs), which helps to reduce the parasitic resistance to obtain higher maximum oscillation frequencies(f$\_$max/). The dependence of Si and SiGe deposition rates on exposed windows and their evolution with the addition of HCl to the gas mixture are investigated. SiH$_2$Cl$_2$ was used as the source of Si SEG(Selective Epitaxial Growth) and GeH$_4$ was added to grow SiGe SEG. The addition of HCl into the gas mixture allows increasing an incubation time even low growth temperature of 675∼725$^{\circ}C$. In addition, the selectivity is enhanced for the SiGe alloy and it was proposed that the incubation time for the polycrystalline deposit on the oxide is increased probably due to GeO formation. On the other hand, when only SiGe SEG(Selective Epitaxial Growth) layer is used for extrinsic base, it shows a higher sheet resistance with Ti-silicide because of Ge segregation to the interface, but in case of Si or Si/SiGe SEG layer, the sheet resistance is decreased up to 70 %.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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• pp.190-191
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• 2006

We have investigated optical properties of Si/graded-$Si_{1-x}Ge_x$/Si heterostructures grown by reduced pressure chemical vapor deposition. Compared to standard condition using Si(100) substrate and growth temperature of $650^{\circ}C$, Si(111) resulted in low growth rate and high Ge mole fraction. Also samples grown at higher temperatures exhibited increased growth rate and reduced Ge mole fraction. The features regarding both substrate temperature and crystal orientation, representing high incorporation of silicon supplied from gas stream played as a key parameter, illustrate that reaction control were prevailed in this process growth condition. Using secondary ion mass spectroscopy and spectroscopic ellipsometry, microscopic changes in atomic components could be analyzed for Si/graded-$Si_{1-x}Ge_x$/Si heterostructures.

• Transactions on Electrical and Electronic Materials
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• 제17권4호
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• pp.196-200
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• 2016

We have developed new electrostatic discharge (ESD) protection devices with, bidirectional flip chip transient voltage suppression. The devices differ in their epitaxial (epi) layers, which were grown by reduced pressure chemical vapor deposition (RPCVD). Their ESD properties were characterized using current-voltage (I-V), capacitance-voltage (C-V) measurement, and ESD analysis, including IEC61000-4-2, surge, and transmission line pulse (TLP) methods. Two BD-FCTVS diodes consisting of either a thick (12 μm) or thin (6 μm), n-Si epi layer showed the same reverse voltage of 8 V, very small reverse current level, and symmetric I-V and C-V curves. The damage found near the corner of the metal pads indicates that the size and shape of the radius governs their failure modes. The BD-FCTVS device made with a thin n- epi layer showed better performance than that made with a thick one in terms of enhancement of the features of ESD robustness, reliability, and protection capability. Therefore, this works confirms that the optimization of device parameters in conjunction with the doping concentration and thickness of epi layers be used to achieve high performance ESD properties.

• 센서학회지
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• 제8권3호
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• pp.239-246
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• 1999

MOCVD로 성장된 p-i-n 구조의 InSb 웨이퍼를 이용하여 $3{\sim}5\;{\mu}m$ 영역의 적외선을 감지할 수 는 고감도 광기전력 형태의 적외선 광다이오드를 제조하였다. InSb는 녹는점과 표면원자들의 증발온도가 낮기 때문에 광다이오드의 접합계면과 표면의 절연보호막으로 $SiO_2$ 박막을 원격 PECVD를 이용하여 성장시켰다. 광다이오드의 저항성 접촉을 위해 In을 증착하였고 77K의 암상태에서 전류-전압 특성을 조사하였다. 영전위 저항과 수광면적의 적($R_0A$)이 $1.56{\times}10^6\;{\Omega}{\cdot}cm^2$의 높은 값을 가졌는데 이는 BLIP 조건을 만족하는 높은 값이었다. InSb 광다이오드에 적외선을 입사 했을때 $10^{11}\;cm{\cdot}Hz^{1/2}{\cdot}W^{-1}$의 매우 높은 정규화된 검지도를 나타내었다. 높은 양자효율과 검지도로 인해 제조된 InSb 적외선 단위 셀을 적외선 array에 그 적용이 가능할 것으로 보인다.