• The Korean Journal of Quaternary Research
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• v.21 no.2
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• pp.64-67
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• 2007

• Proceedings of the Korean Quaternary Association Conference
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• 2002.12a
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• pp.91-91
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• 2002

• The Korean Journal of Quaternary Research
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• v.19 no.2
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• pp.45-49
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• 2005

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.3 s.333
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• pp.43-50
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• 2005

In this paper, quaternary logic gates using Down literal circuit(DLC) has been designed, and then synchronous Quaternary un/down counter using those gates has been proposed The proposed counter consists of T-type quaternary flip flop and 1-of-2 threshold-t MUX, and T-type quaternary flip flop consists of D-type quaternary flip flop and quaternary logic gates(modulo-4 addition gates, Quaternary inverter, identity cell, 1-of-4 MUX). The simulation result of this counter show delay time of 10[ns] and power consumption of 8.48[mW]. Also, assigning the designed counter to MVL(Multiple-valued Logic) circuit, it has advantages of the reduced interconnection and chip area as well as easy expansion of digit.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.152-162
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• 2003

In this paper, Binary to Quaternary Converter(BQC), Quaternary to Binary Converter(QBC) and Quaternary inverter circuit, which is the basic logic gate, have been proposed based on voltage mode. The BQC converts the two bit input binary signals to one digit quaternary output signal. The QBC converts the one digit quaternary input signal to two bit binary output signals. And two circuits consist of Down-literal circuit(DLC) and combinational logic block(CLC). In the implementation of quaternary inverter circuit, DLC is used for reference voltage generation and control signal, only switch part is implemented with conventional MOS transistors. The proposed circuits are simulated in 0.35 ${\mu}{\textrm}{m}$ N-well doubly-poly four-metal CMOS technology with a single +3V supply voltage. Simulation results of these circuit show 250MHz sampling rate, 0.6mW power consumption and maintain output voltage level in 0.1V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.4
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• pp.637-645
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• 2015

Recently, a spatial modulation (SM) scheme achieving high throughput based on quaternary quasi-orthogonal sequences (Q-QOSs), referred to as Q-QOS-SM, is presented for $N_t=2^n(n=1,2,{\cdots})$ transmit antennas. In this paper, based on the design approach of the conventional Q-QOS-SM, new improved QO-SM (I-QO-SM) schemes are proposed for 8 transmit antennas. The new schemes employ Q-QOSs of length 4 or 2 unlike of 8 in the original one, which guarantees more information bits to be allocated for antenna index parts compared to the conventional Q-QOS-SM. By computer simulation results, the proposed scheme are shown to enjoy much higher throughputs compared to the conventional other SM schemes for all simulation environments. Finally, we also examine and compare analytically the performances of the new and conventional SM schemes by calculating upper-bounds on BER performance.

• Journal of IKEEE
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• v.9 no.1 s.16
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• pp.1-6
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• 2005

This paper proposes a high performance multiplier using CMOS multiple-valued logic circuits. The multiplier based on the Modified Baugh-Wooley algorithm is designed with current-mode CMOS quaternary logic circuits. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion block), current-mode quaternary logic full-adder block, and quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. This multiplier can easily adapted to the binary system by the encoder and the decoder. This circuit is designed with 0.35um standard CMOS process at 3.3V supply voltage and 5uA unit current. The validity and effectiveness are verified through the HSPICE simulation.

• The Korean Journal of Quaternary Research
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• v.33 no.1_2
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• pp.49-58
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• 2021

In the Paleoclimate Modeling Intercomparison Project phase 4 (PMIP4), various experiments for quaternary climatic change are being carried out along with the Coupled Model Intercomparison Project phase 6 (CMIP6). With the CMIP6 preindustrial climate experiment (piControl), the equilibrium climate simulations of 6 ka Holocene experiment (midHolocene), 21 ka Last Glacial Maximum experiment (lgm), and 127 ka Last Interglacial experiment (lig127k) experiment, and transient climate simulations of 850-1849 Common Era Last Millennium experiment (past1000), 21-9 ka last deglaciation, and 140-127 ka penultimate deglaciation experiment have been carried out under PMIP4 protocols by several modeling groups. In this technical note, important physical parameters and boundary conditions of these Tier 1 experiments and a list of additional Tier 2 and 3 experiments are summarized.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.4
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• pp.404-414
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• 2016

So called quaternary quasi-orthogonal sequence spatial modulation (Q-QOS-SM) has been presented with an advantage of improved throughputs compared to the conventional SM and generalized spatial modulation (GSM) by virtue of a larger set size of QOSs and its minimized correlation value between these QOSs. However the Q-QOS-SM has been originally invented for limited transmit antennas of only powers of two. In this paper, by extending the Q-QOS-SM to any number of transmit antennas, we propose a generalized Q-QOS-SM, referred as G-QO-SM. Unlike the conventional Q-QOS-SM using the Q-QOSs of length of any power of two, the proposed G-QO-SM is constructed based on the Q-QOSs of only the lengths of 2 and 4. The proposed scheme guarantees the transmission of the total $N_t$ spatial bits with $N_t$ transmit antennas, and thus achieves greatly higher throughputs than the other existing schemes including the SM, GSM, Q-QOS-SM, Quadrature-SM, and Enhanced-SM. The performance improvements of the proposed G-QO-SM is justified by comparing the analytically derived BER upper bounds and also the exact Monte Carlo simulation results.

• The Korean Journal of Quaternary Research
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• v.22 no.1
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• pp.13-22
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• 2008

The Indian summer monsoon behaved in an abnormal way in 2002 and as a result there was a large deficiency in precipitation (especially in July) over a large part of the Indian subcontinent. For the study of deficient monsoon of 2002, a recent version of the NCAR regional climate model (RegCM3) has been used to examine the important features of summer monsoon circulations and precipitation during 2002. The main characteristics of wind fields at lower level (850 hPa) and upper level (200 hPa) and precipitation simulated with the RegCM3 over the Indian subcontinent are studied using different cumulus parameterization schemes namely, mass flux schemes, a simplified Kuo-type scheme and Emanuel (EMU) scheme. The monsoon circulation features simulated by RegCM3 are compared with the NCEP/NCAR reanalysis and simulated precipitation is validated against observation from the Global Precipitation Climatology Centre (GPCC). Validation of the wind fields at lower and upper levels shows that the use of Arakawa and Schubert (AS) closure in Grell convection scheme, a Kuo type and Emanuel schemes produces results close to the NCEP/NCAR reanalysis. Similarly, precipitation simulated with RegCM3 over different homogeneous zones of India with the AS closure in Grell is more close to the corresponding observed monthly and seasonal values. RegcM3 simulation also captured the spatial distribution of deficient rainfall in 2002.