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A Study on the Design of Binary to Quaternary Converter  

한성일 (인하대학교 전자공학과)
이호경 (삼성전자 반도체설계연구실)
이종학 (체육과학연구원)
김흥수 (인하대학교 전자전기공학부)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SC / v.40, no.3, 2003 , pp. 152-162 More about this Journal
Abstract
In this paper, Binary to Quaternary Converter(BQC), Quaternary to Binary Converter(QBC) and Quaternary inverter circuit, which is the basic logic gate, have been proposed based on voltage mode. The BQC converts the two bit input binary signals to one digit quaternary output signal. The QBC converts the one digit quaternary input signal to two bit binary output signals. And two circuits consist of Down-literal circuit(DLC) and combinational logic block(CLC). In the implementation of quaternary inverter circuit, DLC is used for reference voltage generation and control signal, only switch part is implemented with conventional MOS transistors. The proposed circuits are simulated in 0.35 ${\mu}{\textrm}{m}$ N-well doubly-poly four-metal CMOS technology with a single +3V supply voltage. Simulation results of these circuit show 250MHz sampling rate, 0.6mW power consumption and maintain output voltage level in 0.1V.
Keywords
QBC; BQC; MVL; Neuron MOS; DLC;
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