• Title/Summary/Keyword: Quantum-dot cellular automata

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Design of PCA Architecture Based on Quantum-Dot Cellular Automata (QCA 기반의 효율적인 PCA 구조 설계)

  • Shin, Sang-Ho;Lee, Gil-Je;Yoo, Kee-Young
    • Journal of Advanced Navigation Technology
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    • v.18 no.2
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    • pp.178-184
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    • 2014
  • CMOS technology based on PCA is very efficient at an implementation of memory or ALU. However, there has been a growing interest in quantum-dot cellular automata (QCA) because of the limitation of CMOS scaling. In this paper, we propose a design of PCA architecture based on QCA. In the proposed PCA design, we utilize D flip-flop and XOR logic gate without wire crossing technique, and design a input and rule control switches. In experiment, we perform the simulation of the proposed PCA architecture by QCADesigner. As the result, we confirm the efficiency the proposed architecture.

Design of Programmable Quantum-Dot Cell Structure Using QCA Clocking Based D Flip-Flop (QCA 클록킹 방식의 D 플립플롭을 이용한 프로그램 가능한 양자점 셀 구조의 설계)

  • Shin, Sang-Ho;Jeon, Jun-Cheol
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.6
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    • pp.33-41
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    • 2014
  • In this paper, we propose a D flip-flop based on quantum-dot cellular automata(QCA) clocking and design a programmable quantum-dot cell(QPCA) structure using the proposed D flip-flop. Previous D flip-flops on QCA are that input should be set to an arbitrary value, and wasted output values exist because it was utilized to duplicate by clock pulse and QCA clocking. In order to eliminate these defects, we propose a D flip-flop structure using binary wire and clocking technique on QCA. QPCA structure consists of wire control logic, rule control logic, D flip-flop and XOR logic gate. In experiment, we perform the simulation of QPCA structure using QCADesigner. As the result, we confirm the efficiency of the proposed structure.

Digital Logic Extraction from Quantum-dot Cellular Automata Designs (Quantum-dot Cellular Automata 회로로부터 디지털 논리 추출)

  • Oh, Youn-Bo;Lee, Eun-Choul;Kim, Kyo-Sun
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.139-141
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    • 2006
  • Quantum-dot Cellular Automata (QCA) is one of the most promising next generation nano-electronic devices which will inherit the throne of CMOS which is the domineering implementation technology of large scale low power digital systems. In late 1990s, the basic operations of the QCA cell were already demonstrated on a hardware implementation. Also, design tools and simulators were developed. Nevertheless, its design technology is not quite ready for ultra large scale designs. This paper proposes a new approach which enables the QCA designs to inherit the verification methodologies and tools of CMOS designs, as well. First, a set of disciplinary rules strictly restrict the cell arrangement not to deviate from the predefined structures but to guarantee the deterministic digital behaviors. After the gate and interconnect structures of the QCA design are identified, the signal integrity requirements including the input path balancing of majority gates, and the prevention of the noise amplification are checked. And then the digital logic is extracted and stored in the OpenAccess common engineering database which provides a connection to a large pool of CMOS design verification tools. Towards validating the proposed approach, we designed a 2-bit QCA adder. The digital logic is extracted, translated into the Verilog net list, and then simulated using a commercial software.

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Ultradense 2-to-4 decoder in quantum-dot cellular automata technology based on MV32 gate

  • Abbasizadeh, Akram;Mosleh, Mohammad
    • ETRI Journal
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    • v.42 no.6
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    • pp.912-921
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    • 2020
  • Quantum-dot cellular automata (QCA) is an alternative complementary metal-oxide-semiconductor (CMOS) technology that is used to implement high-speed logical circuits at the atomic or molecular scale. In this study, an optimal 2-to-4 decoder in QCA is presented. The proposed QCA decoder is designed using a new formulation based on the MV32 gate. Notably, the MV32 gate has three inputs and two outputs, which is equivalent two 3-input majority gates, and operates based on cellular interactions. A multilayer design is suggested for the proposed decoder. Subsequently, a new and efficient 3-to-8 QCA decoder architecture is presented using the proposed 2-to-4 QCA decoder. The simulation results of the QCADesigner 2.0.3 software show that the proposed decoders perform well. Comparisons show that the proposed 2-to-4 QCA decoder is superior to the previously proposed ones in terms of cell count, occupied area, and delay.

Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata

  • Hayati, Mohsen;Rezaei, Abbas
    • ETRI Journal
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    • v.34 no.2
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    • pp.284-287
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    • 2012
  • Quantum-dot cellular automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power consumption in comparison with CMOS technology. This letter proposes an optimized full comparator for implementation in QCA. The proposed design is compared with previous works in terms of complexity, area, and delay. In comparison with the best previous full comparator, our design has 64% and 85% improvement in cell count and area, respectively. Also, it is implemented with only one clock cycle. The obtained results show that our full comparator is more efficient in terms of cell count, complexity, area, and delay compared to the previous designs. Therefore, this structure can be simply used in designing QCA-based circuits.

Design of Extendable XOR Gate Using Quantum-Dot Cellular Automata (확장성을 고려한 QCA XOR 게이트 설계)

  • You, Young-Won;Kim, Kee-Won;Jeon, Jun-Cheol
    • Journal of Advanced Navigation Technology
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    • v.20 no.6
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    • pp.631-637
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    • 2016
  • Quantum cellular automata (QCA) are one of the alternative technologies that can overcome the limits of complementary metal-oxide-semiconductor (CMOS) scaling. It consists of nano-scale cells and demands very low power consumption. Various circuits on QCA have been researched until these days, and in the middle of the researches, exclusive-OR (XOR) gates are used as error detection and recover. Typical XOR logic gates have a lack of scalable, many clock zones and crossover designs so that they are difficult to implement. In order to overcome these disadvantages, this paper proposes XOR design using majority gate reduced clock zone. The proposed design is compared and analysed to previous designs and is verified the performance.

Design of Extendable BCD-EXCESS 3 Code Convertor Using Quantum-Dot Cellular Automata (확장성을 고려한 QCA BCD-3초과 코드 변환기 설계)

  • You, Young-won;Jeon, Jun-cheol
    • Journal of Advanced Navigation Technology
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    • v.20 no.1
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    • pp.65-71
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    • 2016
  • Quantum-dot cellular automata (QCA) consists of nano-scale cells and demands very low power consumption so that it is one of the alternative technologies that can overcome the limits of scaling CMOS technologies. Typical BCD-EXCESS 3 code converters using QCA have not considered the scalability so that the architectures are not suitable for a large scale circuit design. Thus, we design a BCD-EXCESS 3 code converter with scalability using QCADesigner and verify the effectiveness by simulation. Our structure have reduced 32 gates and 7% of garbage space rate compare with typical URG BCD-EXCESS 3 code converter. Also, 1 clock is only needed for circuit expansion of our structure though typical QCA BCD-EXCESS 3 code converter demands 7 clocks.

Efficient Design of BCD-EXCESS 3 Code Converter Using Quantum-Dot Cellular Automata (QCA를 이용한 효율적인 BCD-3초과 코드 변환기 설계)

  • You, Young-Won;Jeon, Jun-Cheol
    • Journal of Advanced Navigation Technology
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    • v.17 no.6
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    • pp.700-704
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    • 2013
  • Quantum-dot cellular automata(QCA) is a new technology and it is an one of the alternative high performance over existing complementary metal-oxide semi-conductor(CMOS). QCA is nanoscale device and ultra-low power consumption compared with transistor-based technologies, and various circuits using QCA technology have been proposed. Binary-coded decimal(BCD), which represents decimal digits in binary, is mainly used in electronic circuits and Microprocessor, and it is comfortable in conversion operation but many data loss. In this paper, we present an BCD-EXCESS 3 Code converter which can be efficiently used for subtraction and half adjust. The proposed scheme has efficiently designed considering space and time complexities and minimization of noise, and it has been simulated and confirmed.

XOR Gate Based Quantum-Dot Cellular Automata T Flip-flop Using Cell Interaction (셀 간 상호작용을 이용한 XOR 게이트 기반의 양자점 셀룰러 오토마타 T 플립플롭)

  • Yu, Chan-Young;Jeon, Jun-Cheol
    • The Journal of the Convergence on Culture Technology
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    • v.7 no.1
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    • pp.558-563
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    • 2021
  • Quantum-Dot Cellular Automata is a next-generation nanocircular design technology that is drawing attention from many research organizations not only because it is possible to design efficient circuits by overcoming the physical size limitations of existing CMOS circuits, but also because of its energy-efficient features. In this paper, one of the existing digital circuits, T flip-flop circuit, is proposed using QCA. The previously proposed T flip-flops are designed based on the majority gate, so the circuits are complex and have long delays. Therefore, the design of the XOR gate-based T flip-flop using cell interaction reduces circuit complexity and minimizes latency. The proposed circuit is simulated using QCADesigner, and the performance is compared and analyzed with the existing proposed circuits.

Multi-layer Structure Based QCA Half Adder Design Using XOR Gate (XOR 게이트를 이용한 다층구조의 QCA 반가산기 설계)

  • Nam, Ji-hyun;Jeon, Jun-Cheol
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.3
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    • pp.291-300
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    • 2017
  • Quantum-dot cellular automata(QCA) is a computing model designed to be similar to cellular automata, and an alternative technology for next generation using high performance and low power consumption. QCA is undergoing various studies with recent experimental results, and it is one of the paradigms of transistors that can solve device density and interconnection problems as nano-unit materials. An XOR gate is a gate that operates so that the result is true when either one of the logic is true. The proposed XOR gate consists of five layers. The first layer consists of OR gates, the third and fifth layers consist of AND gates, and the second and fourth layers are designed as passages in the middle. The half adder consists of an XOR gate and an AND gate. The proposed half adder is designed by adding two cells to the proposed XOR gate. The proposed half adder consists of fewer cells, total area, and clock than the conventional half adder.