• International Journal of Reliability and Applications
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• 제2권4호
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• pp.253-262
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• 2001

A k-out-of-n standby system is considered where all of its components are s-independent and classified either working or cold standby connected with imperfect switches. The probability density function of the life length for this system is established in closed form, when the underlying components have constant failure rates. Also the reliability function of the system is derived. Finally, the reliability functions for one, two and three out of four systems are deduced for perfect or imperfect switches and identical or non-identical constant failure rates for working and standby components.

• 통합자연과학논문집
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• 제13권4호
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• pp.152-157
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• 2020

To monitor all elements simultaneously of variance-covariance matrix Σ of several correlated quality characteristics under multivariate normal process Np($\underline{\mu}$, Σ), multivariate exponentially weighted moving average (EWMA) chart and cumulative sum (CUSUM) chart are considered and compared. Numerical performances of the considered variable sampling interval (VSI) charts are evaluated using average run length (ARL), average time to signal (ATS), average number of switches (ANSW) to signal, and the probability of switch Pr(switch) between two sampling interval d1 and d2 where d1 < d2. For small or moderate changes of Σ, the performances of multivariate EWMA chart is approximately equivalent to that of multivariate CUSUM chart.

• 한국통신학회논문지
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• 제22권6호
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• pp.1148-1159
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• 1997

In the broadband integrated service digital networks (B-ISDN), ATM switches hould be abld to accommodate diverse types of applications ith different traffic characteristics and quality ddo services (QOS). Thus, in order to increase the utilization of switches and satisfy the QOS's of each traffic type, some types of priority control schemes are needed in ATM switches. In this paper, a nonblocking input and output queueing ATm switch with capacity C is considered in which two classes of traffics with different loss probability constraints are admitted. 'Partial push-out' algorithm is suggested as a loss priority control schemes, and the performance of this algorithm is analyzed when this is adopted in input buffers of the switch. The quque length distribution of input buffers and loss probabilities of each traffic are obtained using a matrix-geometric solution method. Numerical analysis and simulation indicate that the utilization of the switch with partial push-out algorithm satisfying the QOS's of each traffic is much higher than that of the switch without control. Also, the required buffer size is reduced while satisfying the same QOS's.

• Journal of the Korean Data and Information Science Society
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• 제28권4호
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• pp.911-925
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• 2017

We investigate the properties of multivariate Shewart control charts with VSI procedure for monitoring simultaneous monitoring mean vector and covariance matrix in term of ANSW (average number of switches), probability of switch and ASI (average sampling interval), ATS (average time to signal). From examining the ANSW values, we know that it does not switch frequently. The VSI control charts are superior to the corresponding FSI control charts in terms of ATS. And, it can be also seen that the VSI procedures have substantially fewer switches for small or moderate shifts of the mean vector and variances.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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• pp.374-377
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• 2003

In this paper, a performance evaluation model of the Fat-Tree network with the multiple-buffered crossbar switches is proposed and examined. Buffered switch technique is well known to solve the data collision problem in the switch network The proposed evaluation model is developed by investigating the transfer patterns of data packets in a switch with output-buffers. Steady state probability concept is used to simplify the analyzing processes. Two important parameters of the network performance, throughput and delay, are then evaluated. To validate the proposed analysis model, the simulation is carried out on the various sizes of Fat-tree networks that use the multiple a$\times$b buffered crossbar switches. It is observed that both analysis and simulation results are match closely.

• 경영과학
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• 제10권1호
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• pp.139-156
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• 1993

Various ATM switches have been proposed since Asynchronous Transfer Mode (ATM) was recognized as appropriate for implementing broadband integrated services digital network (BISDN). An ATM switching network may be evaluated on two sides : traffic performances (maximum throughput, delay, and packet loss probability, etc.) and structural features (complexity, i.e. the number of switch elements necessary to construct the same size switching network, maintenance, modularity, and fault tolerance, etc.). ATM switching networks proposed to date tend to show the contrary characteristics between structural features and traffic performance. The Knockout Switch, which is well known as one of ATM switches, shows a good traffic performance but it needs so many switch elements and buffers. In this paper, we propose an input and output buffered Knockout Switch for the purpose of reducing the number of switch elements and buffers of the existing Knockout Switch. We analyze the traffic performance and the structural features of the proposed switching architecture through a discrete time Markov chain and compare with those of the existing Knockout Switch. It was found that the proposed architecture could reduce more than 40 percent of switch elements and more than 30 percent of buffers under a given requirement of cell loss probability of the switch.

• 전자공학회논문지B
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• 제28B권10호
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• pp.807-821
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• 1991

A mulitpath MIN(Multistage Interconnection Network), CSMP(Chained Shuffle Multi-Path) network, is proposed, having fault-tolerance and dynamic reroutability. The number of stages and the number of links between adjacent stagges are the same as in single path MINs, so the overall hardware complexity is considerably reduced in comparison with other multipath MINs. The CSMP networks feature links between switches belonging to the same state, forming loops of switches. The network can tolerate multiple faults, up to (N/4)*(log$_2$N-1), having occured in any stages including the first and the last ones(N:NO. of input). To analyze reliability, terminal reliability (TR) and mean time to failure( MTTE) age given for the networks, and the TR figures are compared to those of other static and dynamic rerouting multipath MINs. Also the MTTE figures are compared. The performance of the proposed network with respect to its bandwidth (BW) and probability of acceptance(PA) is analyzed and is compared to that of other more complex multipath MINs. The cost efficiency analysis of reliability and performance shows that the network is more cost-effective than other previously proposed fault-tolerant multipath MINs.

• 정보처리학회논문지C
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• 제10C권3호
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• pp.317-324
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• 2003

PN 부호와 광 스위치를 사용하여 시간영역에서 확산하는 CDMA 방식에 의한 광 가입자 액세스 망을 제안한다. 무선통신에 널리 사용되는 PN 계열 부호를 사용하여 양극성(bipolar) 데이터를 수신측에서 상관할 수 있는 구조를 제안한다. 광 스위치의 ON/OFF를 통하여 PN 부호를 소프트웨어적으로 구성할 수 있어 광 가입자에 배분할 수 있는 부호계열의 수가 증가 증가하고, 부호 배분에 있어서 유연성을 갖고 있다. 그리고 이론적으로 제안한 광 가입자 액세스 망의 성능을 해석하고 종래의 광섬유 형 정합필터를 이용한 광 CDMA 방식을 적용한 광 가입자 액세스 망에 비하여 성능이 향상됨을 수치 계산을 통하여 명확히 한다.

• 한국정보과학회논문지:정보통신
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• 제29권6호
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• pp.738-748
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• 2002

본 논문에서는, ${\alpha}{\times}{\alpha}$ 출력 버퍼 스위치로 구성된 다단 연결 망(Multistage Interconnection Network, MIN)의 성능 예측 모형을 제안하고, 스위치에 장착된 버퍼의 개수 증가에 따른 성능 향상 추이를 분석하였다. Buffered 스위치 기법은 다단 연결 망 내부의 데이타 충들 문제를 효과적으로 해결할 수 있는 방법으로 널리 알려져 있다. 제안한 성능 예측 모형은 먼저 네트웍 내부 임의 스위치 입력 단에 유입되는 데이타 패킷이 스위치 내부에서 전공되는 유형을 확률적으로 분석하여 수립되었다. 제안한 모형은 스위치에 장착된 버퍼의 개수와 무관하게 출력 버퍼를 장착한 ${\alpha}{\times}{\alpha}$스위치의 성능, 즉 네트웍 성능 평가의 두 가지 주요 요소인 네트웍 정상상태 처리율(Normalized Throughput, NT)과 네트웍 지연시간(Network Delay)의 예측이 가능하고, 나아가서 이들로 구성된 모든 종류의 다단 연결 망 성 분석에 적용이 용이하다. 제안한 수학적 성능 분석 연구의 실효성 검증을 위하여 병행된 시뮬레이션 결과는 상호 미세한 오차 범위 내에서 모형의 예측 데이타와 일치하는 곁과를 보며 분석 모형의 타당성을 입증하였다. 또한, 분석 결과 스위치 내부에 많은 버퍼를 장착할수록 정상상태 처리율의 증가율은 감소하고, 네트웍 지연시간은 증가하는 것으로 나타났다.

• 한국정보과학회논문지:정보통신
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• 제34권3호
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• pp.193-202
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• 2007

본 논문에서는, $a{\times}a$ 출력 버퍼 스위치로 구성되며 핫스팟이 발생하는 다단 연결 망 (Multistage Interconnection Network， MIN)의 성능 예측 모형을 제안하고, 스위치에 장착된 버퍼의 개수 증가에 따른 성능 향상 추이를 분석하였다. 제안한 성능 예측 모형은 먼저 네트워크 내부의 임의 스위치 입력 단에 유입되는 데이타 패킷이 스위치 내부에서 전송되는 유형을 확률적으로 분석하여 수립되었다. 성능분석 모형은 스위치에 장착된 버퍼의 개수와 무관하게 버퍼를 장착한 $a{\times}a$ 스위치의 성능, 네트워크 정상상태 처리율(Normalized Throughput, NT)과 네트워크 지연시간(Network Delay)의 예측이 가능하고, 나아가서 이들로 구성된 모든 종류의 다단 연결망 성능 분석에 적용이 용이하다. 제안한 수학적 성능 분석 연구의 실효성 검증을 위하여 병행된 시abf레이션 결과는 상호 미세한 오차 범위 내에서 모형의 예측 데이타와 일치하는 결과를 보여 분석 모형의 타당성을 입증하였다.