• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.157-164
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• 2022

This study proposes an enhanced quadruple-Active-Bridge (QAB) converter that can solve power coupling problems. By adopting a multiple winding transformer, the equivalent circuit of a conventional QAB converter has power couplings between arbitrary output ports. This coupling is an unintended power relationship that complicates the regulation of output voltage of the multiple ports. The proposed converter can carry out power decoupling by changing the arrangement of the coupling inductor. Power transfer equations for the proposed converter and its operating principles are analyzed in detail. The power coupling caused by the transformer's leakage inductance is verified by using a proposed coupling factor that presents the relationship between inductance ratio and coupling power. In addition, the decoupling power control performance of the proposed converter is verified by simulation and a 3 kW prototype converter.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.23-32
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• 2006

Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.7 s.349
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• pp.29-37
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• 2006

This paper presents a new analytical model to suppress RLC resonance effects which inevitably occur in power/ground lines due to on-chip decoupling capacitor and other interconnect circuit parasitics (i.e., package inductance, on-chip decoupling capacitor, and output drivers, etc.). To characterize the resonance effects, the resonance frequency of the circuit is accurately estimated in an analytical manner. Thereby, a decoupling capacitor size to suppress the resonance for a suitable circuit operation is accurately determined by using the estimated resonance frequency. The developed novel design methodology is verified by using $0.18{\mu}m$ process-based-HSPICE simulation.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.103-104
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• 2012

In the AC module system, mismatch problem between AC power and constant input power is occurred. To solve this problem, electrolytic capacitor is utilized for diminishing power pulsation in PV side. However, it has disadvantages of low life span and weak in temperature. Decoupling method has been studied to reduce the capacitance and replaces electrolytic capacitor to film capacitor. This paper proposes design method for decoupling circuit which bidirectional DC-DC converter using soft switching. Proposed system is verified by design optimization and simulation results.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.246-247
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• 2017

단상 ac/dc, dc/ac 시스템의 경우, ac와 dc사이의 전력 불균형으로 인해 double line frequency ripple power가 발생한다. 이는 harmonic disturbance을 야기시킨다. 일반적으로 전력 리플을 줄이기 위하여 dc-link에 용량이 큰 전해 커패시터를 사용하는데, 용량이 큰 전해 커패시터는 높은 equivalent series resistance(ESR)을 가지며, 상대적으로 짧은 수명을 갖는 한계를 갖는다. 본 논문은 active power decoupling을 추가함으로써 전해 커패시터를 용량이 작은 필름 커패시터로 대체한 회로 구조를 제시한다. 그리고 dc-link 커패시터 선정방법, 설계한 제어기의 성능과 부하 변동에 따른 실험을 PSIM 시뮬레이션으로 확인하고 실험을 통해 검증한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.4
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• pp.294-297
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• 2021

A grid voltage estimation method for modular plug-in active power decoupling (APD) circuits is proposed in this study as direct replacements of electrolytic capacitors. Since modular plug-in APD circuits cannot have additional grid voltage sensors and should be operated independently without information exchange with the front-end converter, it is impossible to obtain the phase information of the grid directly. Therefore, the proposed method uses the second-order harmonic component of the DC-link voltage to estimate the grid voltage necessary to control the APD circuit. By employing the proposed method, the concept of modular plug-in APD circuits can be realized and implemented without direct detection of the grid voltage. The experimental results based on hardware-in-the-loop simulation (HILS) validate the effectiveness of the proposed control method.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.419-420
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• 2015

In this paper, a low-cost single-phase PWM rectifier with small DC-link capacitors is proposed, where a buck-boost converter with a low power rating is added at the DC link. By controlling the auxiliary circuit so as to absorb the voltage ripple in the DC link, the second-order voltage ripple in DC-link capacitor can be reduced significantly. Therefore, a small film capacitor can be utilized to replace the bulky electrolytic capacitors. The simulation results are shown to verify the validity of the proposed method.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.55-56
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• 2012

In general, a power decoupling method using electrolytic capacitor is used to solve a problem that appears 120[Hz] ripple of grid at the PV module output. But electrolytic capacitor has a effect on the short lifetime and low reliability of PV system. Therefore, studies which replace the large electrolytic capacitor with small film capacitor have been researched in resent years. This paper proposes flyback inverter which can be replaced with film capacitor by connecting the circuit implementing zero voltage switching in PV side. The proposed system is validated by PSIM simulation.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.11a
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• pp.23-27
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• 2000

Simultaneous Switching Noise (SSN) propagated through parallel power and ground planes in high-speed multilayer printed circuit boards (PCBs) causes malfunction of both digital and analog circuits. To reduce SSN, decoupling capacitors are generally used in the PCBs. In this paper, we improve the equivalent circuit model of decoupling capacitor in high-frequency range to analyze the effect of SSN reduction accurately. The analysis is performed by the microwave and RF design system (MDS) method and the finite difference time domain (FDTD) method. We compared the results by the ideal capacitor model with those by the proposed model.