• Title/Summary/Keyword: Power Amp

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MEM Temperature and Humidity Network Sensor for Wire and Wireless Network (유무선 통신용 MEMS 온습도 네트워크 센서)

  • Jung, Woo-Chul;Cha, Boo-Sang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.360-361
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    • 2006
  • This paper describes a wire and wireless network sensor for temperature and humidity measurements. The network sensor comprises PLC(Power Line Communication) and RF transmitter(433MHz) for acquiring an internal (on-board) sensor signal, and measured data is transmitted to a main processing unit. The network sensor module is consist of MEMS sensor, 10-bit A/D converter, pre-amp., gain-amp., ADUC812 one chip processor and PLC/RF transmitting unit. The temperature and humidity sensor is based on MEMS piezoelectric membrane structure and is implemented by using dual function sensor for smart home and smart building.

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A Study on the ZVT PFC for Using 3[KW] Power Amplifier (Power Amp.용 3KW급 ZVT PFC 개발)

  • Lee, S.R.;Jeong, C.G.;Kim, S.W.;Ko, S.H.
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1306-1308
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    • 2000
  • A new ZVT PFC for using 3[KW] power amplifier is proposed. Generally, the single phase diode rectifier has been widely used in the SMPS of the conventional power amplifier. But this rectifier has occurred some problems which are the input power factor and current harmonics. To solve the above problems, in this paper, two topology is adopted. The one is the boost type PFC for improving the input power factor. The other is the ZVT resonant circuit for reducing the switching loss and stress. In this paper, the proposed topology is analyze designed to built the ZVT PFC for using 3[KW] power amplifier. In order to verify the circuit va finally, the PSPICE simulation and experiment results are presented.

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A Design of 8bit 10MS/s Low Power Pipelined ADC (저전력 8비트 10MS/s 파이프라인 ADC 설계)

  • Bae, Sung-Hoon;Lim, Shin-Il
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.606-608
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    • 2006
  • This paper describes a 8bit 10MS/s low power pipelined analog-to-digital converter(ADC). To reduce power consumption in proposed ADC, a high gain op-amp that consumes large power in MDAC(multiplying DAC) of conventional pipelined ADC is replaced with simple comparator and current sources. Moreover, differential charge transfer amplifier technique with latch in the sub-ADC reduces the power consumption to less than half compared with the conventional sub-ADC which use high speed comparator. The proposed ADC shows the power consumption of 1.8mW at supply voltage of 1.8V. This proposed ADC is suitable to apply to the portable display device. The circuit was implemented with 0.18um CMOS technology and the core size of circuit is 2.5mm${\times}$1mm.

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Design of Low Power TFT-LCD Data Driver and Analog Buffer for Mobile Devices

  • Kim, Joon-Hoon;Kim, Seong-Joong;Shim, Hyun-Sook;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.686-689
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    • 2003
  • This paper describes two kind of new concept for low power consumption for small area TFT-LCDs. First, the proposed analog buffer could reduce the static current by adopting new scheme. Second, new data driver structure reduced DC power consumption by reducing the number of operational amplifier (op-amp). As simulation results of Hspice, the quiescent current of proposed analog buffer is less than $0.8{\mu}A$ and the DC power consumption is reduced about $40{\sim}50%$ compared with conventional ones.

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A Pipelined 60Ms/s 8-bit Analog to Digital Converter (8-bit 60Ms/s 파이프라인 아날로그 디지털 변환기)

  • 조은상;정강민
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.253-256
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    • 2001
  • This paper introduces the design of high-speed analog- to-digital converter for high-definition TV, camcorders, portable equipments and implemented in a 0.65${\mu}{\textrm}{m}$ CMOS technology. Key circuits developed for low power and high speed A/D converter are a dynamic comparator that consumes no static power, a source follower buffered op amp that achives wide bandwidth using large input devices. The converter achieves low power dissipation of 40-mW at 3.3-V power supply. Measured performance includes 0.53 LSB of INL and 0.48 LSB of DNL while sampling at 60MHz.

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Look-up Table type Digital Pre-distorter for Linearization Power Amplifier with Non-linearity and Memory Effect (전력증폭기의 비선형 특성과 Memory Effect를 보상하기 위한 Look-up Table 방식의 Digital Pre-distorter)

  • Choi, Hong-Min;Kim, Wang-Rae;Lyu, Jae-Woo;Ahn, Kwang-Eun
    • 한국정보통신설비학회:학술대회논문집
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    • 2008.08a
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    • pp.218-222
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    • 2008
  • RF power amplifier requires linearization in order to reduce adjacent channel interference. And most of the existing linearization algorithms assume that a PA has memory-less nonlinearity. But for the wider bandwidth signal, the memory effect of PA cannot be ignored. This paper investigates digital pre-distortion by use of a memory polynomial model which compensates for amplifier nonlinearity and memory effect. The look-up table based implementation scheme is used to reduce the computational complexity of the pre-distortion block. The linearization performance is demonstrated on wideband CDMA signal and class AB high power amplifier.

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Design of Boost Converter PFC IC for Unity Power Factor Achievement (단일 역률 달성을 위한 Boost Converter용 PFC IC 설계)

  • Jeon, In-Sun;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Jo, Hyo-Mun;Lee, Jong-Hwa
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.2
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    • pp.60-67
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    • 2010
  • We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

Design of Stack Monitoring System with Improved Performance (성능이 향상된 Stack Monitoring System의 설계)

  • Jang, Kyeong-Uk;Lee, Joo-Hyun;Lee, Seong-Won;Lee, Seung-Ho
    • Journal of IKEEE
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    • v.20 no.3
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    • pp.299-302
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    • 2016
  • In this paper, we designed the stack monitoring system with improved performance. To block the incoming pulse noise to the amplifier, shield and the power supply impedance are reduced and the power circuit is isolated. The control unit is developed with variable high voltage, adaptive gain, offset and threshold in order to match the scintillation detector characteristic to the apparatus. 300-1500V variable high voltage power circuit is configured applicable to various scintillation detector. Stack monitoring system with improved performance guarantee the efficiency and the reliability by considering the characteristic of various scintillation detector. Developed stack monitoring system is evaluated with certified testing equipment and shows excellent performance with respect to the uncertainty of the sensor test results.

Correlative Effects of Yookmijihwangtang(六味地黃湯) on the T helper cell count, Blood cAMP, Testosterone and Cortisol (육미지황탕(六味地黃湯)이 생리활성지표(生理活性指標)와 임파구세포수(淋巴球細胞數)에 미치는 영향(影響))

  • Kim, Young-Kuen;Ryu, Bong-Ha;Park, Dong-Won;Ryu, Ki-Won
    • THE JOURNAL OF KOREAN ORIENTAL ONCOLOGY
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    • v.4 no.1
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    • pp.89-110
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    • 1998
  • Yookmijihwangtang has been widely used oriental herb prescriptions, which is healing some discuss that come from insufficiency of innate essence and deficiency of kidney Ki. The meaning of healing discusses tonification of insufficient innate essence and insufficient kidney Ki can be regarded as reinforcement of wholely power of keeping homeostasis, that is correlated with immuno-responsibility which protects subject from outer antigen to keep normal vital condition. This study was aimed to investigate correlative effects of Yookmijihwangtang water abstract on the RBC, WBC, blood CD4+ T helper cell count, blood testosterone, blood cAMP and blood cortisol. 40 Sprague-Dawley male rats were divided into 5 groups(Normal, Control, Sample I, Sample II, Sample III), 6 animals in every group. Normal group was not treated anything, control group was administrated normal saline in the same dosage of Sample I. 3 Sample groups were received some of Yookmijihwangtang water abstract at one time per 24 hours during 5 days in different dosage. Sample I(1/310pack/ml), Sample II(1/62pack/ml), Sample III(1/2.4pack/ml). After finishing treatment, all experimental subjects were killed for blood sample on RBC, WBC, blood CD4+ T helper cell count, spleen CD4+ T helper cell count, axillary lymph node CD4+ T helper cell count. blood cAMP, blood testosterone and blood cortisol. The results were as follows; RBC and WBC were increased in all sample groups. Blood CD4+ T helper cell count(CD4+ T cell count in the blood/whole lymphocyte count in the blood ${\times}100%$) was Normal $46.17{\pm}5.88$, Control $44.50{\pm}4.37$, Sample I $53.00{\pm}2.28$, Sample II $53.83{\pm}3.87$, Sample III $52.17{\pm}2.93$. By the 95% Duncan ANOVA all experimental groups(sample I, Sample II, Sample III) showed slight significant difference from Normal and Control. Blood cAMP(nmol/l) were Normal $1.12{\pm}0.17$, Control $1.16{\pm}0.32$, Sample I $0.46{\pm}0.07$, Sample II $0.44{\pm}0.04$, Sample III $0.54{\pm}0.04$. All experimental groups were singificantly different from both Normal and Control groups(p<0.05). Blood cortisol(nl/ml) were Normal $100.00{\pm}2.00$ Control $90.00{\pm}4.00$, Sample I $440.00{\pm}5.00$, Sample II $520.00{\pm}40.00$, Sample III $470.00{\pm}7.00$. Blood cortisol of all experimental groups were significantly increased(p<0.05). The results suggest that Yookmijihwangtang water abstract could be administrated to patients who have some diseases insufficient essence.

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Design of the 5th-order Elliptic Low Pass Filter for Audio Frequency using CMOS Switched Capacitor (CMOS 스위치드 캐패시터 방식의 가청주파수대 5차 타원 저역 통과 여파기의 설계 및 구현)

  • Song, Han-Jung;Kwack, Kae-Dal
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.1
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    • pp.49-58
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    • 1999
  • This paper describes an integrated low pass filter fabricated by using $0.8{\mu}m$ single poly CMOS ASIC technology. The filter has been designed for a 5th-order elliptic switched capacitor filter with cutoff frequency of 5khz, 0.1dB passband ripple. The filter consists of MOS swiches poly capacitors and five CMOS op-amps. For the realization of the SC filter, continuous time transfer function H(s) is obtained from LC passive type, and transfered as discrete time transfer H(z) through bilinear-z transform. Another filter has been designed by capacitor scaling for reduced chip area, considering dynamic range of the op-amp. The test results of two fabricated filters are cutoff frequency of 4.96~4.98khz, 35~38dB gain attenuation and 0.72~0.81dB passband ripple with the ${\pm}2.5V$power supply clock of 50KHz.

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