• 한국전기전자재료학회논문지
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• 제13권2호
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• pp.95-100
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• 2000

For the well-controlled growing in-situ heavily phosphorus doped polycrystalline Si films directly on Si wafer by reduced pressure chemical vapor deposition, a study is made of the two step growth. When in-situ heavily phosphorus doped Si films were deposited directly on Si (100) wafer, crystal structure in the film is not unique, that is, the single crystal to polycrystalline phase transition occurs at a certain thickness. However, the well-controlled polycrtstalline Si films deposited by two step growth grew directly on Si wafers. Moreover, the two step growth, which employs crystallization of grew directly on Si wafers. Moreover, the two step growth which employs crystallization of amorphous silicon layer grown at low temperature, reveals crucial advantages in manipulating polycrystal structures of in-situ phosphorous doped silicon.

• 전자공학회논문지D
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• 제34D권1호
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• pp.35-40
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• 1997

A new method to form the gate oxide and recrystllize the polycrystalline silicon (poly-Si) active layer simultaneously is proposed and fabricated successfully. During te irradiation of excimer laser, the poly-Si film is recrystallized, while the oxygen ion impurities injected into the amorphous silicon(a-Si) film are activated by laser energy and react with silicon atoms to form SiO2. We investigated the characteristics of the sample fabricated by proposed method using AES, TEM, AFM. The electrical performance of oxide was verified by ramp up voltage method. Our experimental results show that a high quality oxide, a pol-Si film with fine grain, and a smooth and clean interface between oxide and poly-Si film have been successfully obtained by the proposed fabrication method. The interface roughness of oxide/poly-Si fabricated by new method is superior to film by conventional fabrication os that the proposed method may improve the performance of poly-Si TFTs.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 C
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• pp.1422-1424
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• 1994

This paper deals with piezoresistive humidity sensor using polycrystalline silicon (Poly-Si ) with membrane in sensors of semiconductor. Poly-Si piezoresistors which have no temperature dependancy are deposited on silicon wafer, membrane is formed with micromachining technology, then polyimide is formed as a hygroscopic layer. Whereas the principle of conventional humidify sensors are based on the change in electrical properties of the material, the humidity induced volume change of a polyimide layer leads to a deformation of a silicon membrane in this case. This deformation is transformed into an output voltage by Poly-Si piezoresistive. Wheatstone bridge. Fabricated piezoresistive humidity sensors showed good linearity, response time, and long term stability.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1266-1269
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• 2007

Polycrystalline silicon (poly-Si) films were prepared directly on plastic substrates at a low (< $200^{\circ}C$) by using Catalytic Chemical Vapor Deposition (Cat-CVD) technique without subsequent annealing steps. Surface roughness of the poly-Si layer and the density of the gate dielectric layer were found to be influential to the TFT performance.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 학술대회 및 기술세미나 논문집 디스플레이 광소자
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• pp.62-63
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• 2006

In this paper, the characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) fabricated on polymer substrates are investigated. The a-Si films was laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated nMOS TFT showed field-effect mobility of $30cm2/V{\cdot}s$, on/off ratio of 105 and threshold voltage of 5 V.

• 한국재료학회지
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• 제16권9호
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• pp.571-577
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• 2006

We fabricated thermal evaporated 10 nm-Ni/(poly)Si and 10 nm-Ni/1 nm-Ir/(poly)Si films to investigate the thermal stability of nickel monosilicide at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides for salicide process was formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester is used for sheet resistance. Scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An x-ray diffractometer and an auger depth profile scope were used for phase and composition analysis, respectively. Nickel silicides with iridium on single crystal silicon actives and polycrystalline silicon gates showed low resistance up to $1200^{\circ}C$ and $800^{\circ}C$, respectively, while the conventional nickel monosilicide showed low resistance below $700^{\circ}C$. The grain boundary diffusion and agglomeration of silicides led to lower the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.129-134
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• 2004

The development of fabrication processes of polycrystalline-silicon-thin-film transistors (poly-Si TFTs) at low temperatures is reviewed. Rapid crystallization through laser-induced melt-regrowth has an advantage of formation of crystalline silicon films at a low thermal budget. Solid phase crystallization techniques have also been improved for low temperature processing. Passivation of $SiO_2$/Si interface and grain boundaries is important to achieve high carrier transport properties. Oxygen plasma and $H_2O$ vapor heat treatments are proposed for effective reduction of the density of defect states. TFTs with high performance is reported.

• E2M - 전기 전자와 첨단 소재
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• 제10권8호
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• pp.794-799
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• 1997

Poly-Si films have been prepared by solid phase crystallization of LPCVD(low-pressure CVD) amorphous silicon. The crystallinity of poly-Si films has been derived from UV reflectance spectrum and lies in the range between 70% and 80% . From XRD measurement the peak at 28.2$^{\circ}$from (111) plane is dominantly detected in the SPC poly-Si films, The average grain size of poly-Si film is determined by the image of SEM and varies from 4000 $\AA$ to 8000$\AA$. The electrical conductivity of as-deposited amorphous silicon film is about 2.5$\times$10$^{-7}$ ($\Omega$.cm)$^{-1}$ , and 3~4$\times$10$^{-6}$ ($\Omega$.cm)$^{-1}$ of room temperature conductivity is the SPC poly-Si films. The conductivity activation energies are 0.5~0.6 eV or the 500$\AA$-thick poly-Si films.

• 센서학회지
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• 제18권2호
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• pp.147-153
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• 2009

A thermal flow sensor has been fabricated and characterized, consisting of a center resistive heater surrounded by two upstream and one downstream temperature sensing resistors. The heater and temperature sensing resistors are fabricated from nitrogen-doped(n-type) polycrystalline silicon carbide(poly-SiC) deposited by LPCVD(low pressure chemical vapor deposition) on LPCVD silicon nitride films on a Si substrate. Cavities were etched into the Si substrate from the front side to create suspended silicon nitride membranes carrying the poly-SiC elements. One upstream sensor is located $50{\mu}m$ from the heater and has a sensitivity of $0.73{\Omega}$/sccm with ${\sim}15\;ms$ rise time in a dynamic range of 1000 sccm. N-type poly-SiC has a linear negative temperature coefficient and a TCR(temperature coefficient of resistance) of $-1.24{\times}10^{-3}/^{\circ}C$ from room temperature to $100^{\circ}C$.

• 한국진공학회지
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• 제1권1호
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• pp.183-189
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• 1992

텅스텐 실리사이드를 축적전극으로 하는 얇은 N/O(SiO2/Si3N4) 구조막의 특성을 다 결성 실리콘의 경우와 비교 평가하였다. 누설전류 및 항복전압이 향상되었고 축적용량은 감 소하였다. 용량 감소의 원인중의 하나는 텅스텐 실리사이드 상의 산화막 성장률이 다결성 실리콘 위에서 보다 빠른 것이고 둘째는 열처리에 따라 다결정 실리콘 내 도판트 불순물이 텅스텐 실리사이드를 통하여 외향확산하여 다결정 실리콘 내에 공핍층을 형성하게 되고 공 핍층 용량으로 인하여 축적용량이 감소하게 된다.