• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.3
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• pp.234-239
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• 2007

This paper describes the TiW ohmic contact characteristics under the surface treatment of the polycrystalline 3C-SiC thin film grown on $SiO_2/Si(100)$ wafers by APCVD. The poly 3C-SiC surface was polished by using CMP(chemical mechanical polishing) process and then oxidized by wet-oxidation process, and finally removed SiC oxide layers. A TiW thin film as a metalization process was deposited on the surface treated poly 3C-SiC layer and was annealed through a RTA(rapid thermal annealing) process. TiW/poly 3C-SiC was investigated to get mechanical, physical, and electrical characteristics using SEM, XRD, XPS, AFM, optical microscope, I-V characteristic, and four-point probe, respectively. Contact resistivity of the surface treated 3C-SiC was measured as the lowest $1.2{\times}10^{-5}{\Omega}cm^2$ at $900^{\circ}C$ for 45 sec. Therefore, the surface treatments of poly 3C-SiC are necessary to get better contact resistance for extreme environment MEMS applications.

• Journal of Sensor Science and Technology
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• v.16 no.3
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• pp.197-201
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• 2007

The magnetron reactive ion etching (RIE) characteristics of polycrystalline (poly) 3C-SiC grown on $SiO_{2}$/Si substrate by APCVD were investigated. Poly 3C-SiC was etched by $CHF_{3}$ gas, which can form a polymer as a function of side wall protective layers, with additive $O_{2}$ and Ar gases. Especially, it was performed in magnetron RIE, which can etch SiC at a lower ion energy than a commercial RIE system. Stable etching was achieved at 70 W and the poly 3C-SiC was undamaged. The etch rate could be controlled from $20\;{\AA}/min$ to $400\;{\AA}/min$ by the manipulation of gas flow rates, chamber pressure, RF power, and electrode gap. The best vertical structure was improved by the addition of 40 % $O_{2}$ and 16 % Ar with the $CHF_{3}$ reactive gas. Therefore, poly 3C-SiC etched by magnetron RIE can expect to be applied to M/NEMS applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.131-131
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• 2009

This paper describes the fabrication and characteristics of polycrystalline (poly) 3C-SiC microresonators with $3{\times}10^{17}{\sim}1{\times}10^{19}cm^{-3}$ in-situ N-doping concentrations. In this work, the crystallinity, carrier concentration and surface morphology of the grown thin films were evaluated by X-ray diffraction (XRD), scanning electron microscopy (SEM) and atomic force microscopy (AFM). The 1.2 ${\mu}m$ thick cantilvers and the 0.4 ${\mu}m$ thick doubly-clamped beam microresonators with various lengths were implemented using in-situ doping poly 3C-SiC thin films. The characteristics of the poly 3C-SiC microresonators were evaluated using quartz and a laser vibrometer under vacuum at room temperature. The resonant frequencies of the SiC microresonators decreased with doping concentrations owing to the reduction of the Young's modulus of the poly 3C-SiC thin films. It was confirmed that the resonant frequencies of the poly 3C-SiC microresonators are controllable by adjusting the doping concentrations.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.251-251
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• 2008

In this work, appropriate corrugated structure is suggested to increase resonant frequency of resonators. Micro beam resonators based on polycrystalline 3C-SiC films which have a two-side corrugation along the length of beams were simulated by finite element method and compared to a same - size flat rectangular. With the dimension of $36\times12\times0.5{\mu}m^3$, the flat cantilever has resonant frequency of 746 kHz. Meanwhile, with this size only corrugation width of $6{\mu}m$ and depth of $0.4{\mu}m$, the corrugated cantilever reaches the resonant frequency at 1.252 MHz, and is 68% larger than that of flat type.

• Journal of Industrial Technology
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• v.2
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• pp.13-19
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• 1982

Polycrystalline silicon layers have been deposited by a chemical vapor deposition technique using $SiCl_4$, $H_2$ gas mixture on single crystal silicon substrates. In this work, the effects of depostion temperature and total flow rate on the deposition rate of polycrystalline silicon are investigated. From the experimental results it was found that the formation reaction of polycrystalline silicon was limited by surface reaction and mass transfer controlled as the deposition temperature was increased. The morphology of polycrystalline silicon layer changed from a fine structure to a coarse one as the deposition temperature was increased.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.18 no.1
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• pp.45-49
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• 2008

The development of manufacturing process of silicon (Si) ingots is one of the important issues to the growth of the photovoltaic industry. Polycrystalline Si wafers shares more than 60% of the photovoltaic market due to its cost advantage compared to mono crystalline silicon wafers. Several solidification processes have been developed by industry including casting, heat exchange method (HEM) and electromagnetic casting. In this paper, the advanced directional solidification (ADS) method is used to growth of large sized polycrystalline Si ingot. This method has the advantages of the small heat loss, short cycle time and efficient directional solidification. The numerical simulation of the process is applied using a fluid dynamics model to simulate the temperature distribution. The results of simulations are confirmed efficient directional solidification to the growth of large sized polycrystalline Si ingot above 240 kg.

• Korean Journal of Materials Research
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• v.18 no.9
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• pp.507-510
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• 2008

Electrical properties of multi-channel metal-induced unilaterally precrystallized polycrystalline silicon thin-film transistor (MIUP poly-Si TFT) devices and circuits were investigated. Although their structure was integrated into small area, reducing annealing process time for fuller crystallization than that of conventional crystal filtered MIUP poly-Si TFTs, the multi-channel MIUP poly-Si TFTs showed the effect of crystal filtering. The multi-channel MIUP poly-Si TFTs showed a higher carrier mobility of more than 1.5 times that of the conventional MIUP poly-Si TFTs. Moreover, PMOS inverters consisting of the multi-channel MIUP poly-Si TFTs showed high dynamic performance compared with inverters consisting of the conventional MIUP poly-Si TFTs.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.129-134
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• 2004

The development of fabrication processes of polycrystalline-silicon-thin-film transistors (poly-Si TFTs) at low temperatures is reviewed. Rapid crystallization through laser-induced melt-regrowth has an advantage of formation of crystalline silicon films at a low thermal budget. Solid phase crystallization techniques have also been improved for low temperature processing. Passivation of $SiO_2$/Si interface and grain boundaries is important to achieve high carrier transport properties. Oxygen plasma and $H_2O$ vapor heat treatments are proposed for effective reduction of the density of defect states. TFTs with high performance is reported.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.749-751
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• 2007

A buffer layer consisting of $SiO_x/Ta/Ti$ has been developed in order to overcome the adhesion and stress problems between poly-Si film and mica. Polycrystalline silicon thin film transistor was successfully fabricated on the mica and transferred to a flexible plastic substrate.

• Proceedings of the Materials Research Society of Korea Conference
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• 1993.11a
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• pp.57-58
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• 1993