• 제목/요약/키워드: Photo Transistor

Search Result 72, Processing Time 0.027 seconds

Light Effects on the Bias Stability of Transparent ZnO Thin Film Transistors

  • Shin, Jae-Heon;Lee, Ji-Su;Hwang, Chi-Sun;KoPark, Sang-Hee;Cheong, Woo-Seok;Ryu, Min-Ki;Byun, Chun-Won;Lee, Jeong-Ik;Chu, Hye-Yong
    • ETRI Journal
    • /
    • v.31 no.1
    • /
    • pp.62-64
    • /
    • 2009
  • We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.

Remote Water Quality Warning System Using Water Fleas

  • Park Se-Hyun;Kim Eung-Soo;Park Se-Hoon
    • Journal of information and communication convergence engineering
    • /
    • v.4 no.2
    • /
    • pp.92-96
    • /
    • 2006
  • Hardware for monitoring the water quality using water fleas is developed. Water flea is a frequently used biological sensor for monitoring the water quality. Water fleas quickly respond to the incoming toxic water by changing their activity when they are exposed. By measuring the activity of water fleas, the incoming toxic water is instantly detected. So far the measurement of activity of water fleas has been done with a system equipped with both a light source of LED and a light detector of photo transistor. Water flea itself is, however, sensitive to light resulting in incorrect response and the system has two inconvenient separate parts of the light source and the detector. This paper suggests a system using a CCD camera instead of a light source and a detector. The suggested system processes the image data from the CCD camera in real time without any delay. The developed system becomes a part of the remote water monitoring embedded system.

Effect of Hydrogen in the Gate Insulator on the Bottom Gate Oxide TFT

  • KoPark, Sang-Hee;Ryu, Min-Ki;Yang, Shin-Hyuk;Yoon, Sung-Min;Hwang, Chi-Sun
    • Journal of Information Display
    • /
    • v.11 no.3
    • /
    • pp.113-118
    • /
    • 2010
  • The effect of hydrogen in the alumina gate insulator on the bottom gate oxide thin film transistor (TFT) with an InGaZnO film as the active layer was investigated. TFT with more H-containing alumina films (TFT A) fabricated via atomic layer deposition using a water precursor showed higher stability under positive and negative bias stresses than that with less H-containing alumina deposited using ozone (TFT B). While TFT A was affected by the pre-vacuum annealing of GI, which resulted in $V_{th}$ instability under NBS, TFT B did not show a difference after the pre-vacuum annealing of GI. All the TFTs showed negative-bias-enhanced photo instability.

The development of joint angle sensor using optical fiber (광파이버를 이용한 관절각 센서의 개발)

  • Lee, Hyeon-Hee;Lim, Seung-Kwan;Jeong, Ho-Chun;Lee, Tea-Ho;Chin, Dal-Bok
    • Proceedings of the KIEE Conference
    • /
    • 1997.07b
    • /
    • pp.593-596
    • /
    • 1997
  • The main purpose of this paper is to develop sensing device of joint angle using loss of opfical fiber. The source of light to optical fiber is infrared rays diode, and receiver is a photo transistor. The bent angle of optical fiber is measured with rotary encoder, and The change of voltage due to the loss of light is measured with micro computer PIC16C74. The sensing device may be used to Functional Electrical stimulation(FES) System for Rehabilitation patient.

  • PDF

Stability Enhancement of IZOthin Film Transistor Using SU-8 Passivation Layer (SU-8 패시베이션을 이용한 솔루션 IZO-TFT의안정성 향상에 대한 연구)

  • Kim, Sang-Jo;Yi, Moonsuk
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.7
    • /
    • pp.33-39
    • /
    • 2015
  • In this work, SU-8 passivated IZO thin-film transistors(TFTs) made by solution-processes was investigated for enhancing stability of indium zinc oxide(IZO) TFT. A very viscous negative photoresist SU-8, which has high mechanical and chemical stability, was deposited by spin coating and patterned on top of TFT by photo lithography. To investigate the enhanced electrical performances by using SU-8 passivation layer, the TFT devices were analyzed by X-ray phtoelectron spectroscopy(XPS) and Fourier transform infrared spectroscopy(FTIR). The TFTs with SU-8 passivation layer show good electrical characterestics, such as ${\mu}_{FE}=6.43cm^2/V{\cdot}s$, $V_{th}=7.1V$, $I_{on/off}=10^6$, SS=0.88V/dec, and especially 3.6V of ${\Delta}V_{th}$ under positive bias stress (PBS) for 3600s. On the other hand, without SU-8 passivation, ${\Delta}V_{th}$ was 7.7V. XPS and FTIR analyses results showed that SU-8 passivation layer prevents the oxygen desorption/adsorption processes significantly, and this feature makes the effectiveness of SU-8 passivation layer for PBS.

Simulation Study of a Large Area CMOS Image Sensor for X-ray DR Detector with Separate ROICs (센서-회로 분리형 엑스선 DR 검출기를 위한 대면적 CMOS 영상센서 모사 연구)

  • Kim, Myung Soo;Kim, Hyoungtak;Kang, Dong-uk;Yoo, Hyun Jun;Cho, Minsik;Lee, Dae Hee;Bae, Jun Hyung;Kim, Jongyul;Kim, Hyunduk;Cho, Gyuseong
    • Journal of Radiation Industry
    • /
    • v.6 no.1
    • /
    • pp.31-40
    • /
    • 2012
  • There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

New Semiconducting Multi-branched Conjugated Molecules Bearing 3,4-Ethylene-dioxythiophene-based Thiophenyl Moieties for Organic Field Effect Transistor

  • Kim, Dae-Chul;Lee, Tae-Wan;Lee, Jung-Eun;Kim, Kyung-Hwan;Cho, Min-Ju;Choi, Dong-Hoon;Han, Yoon-Deok;Cho, Mi-Yeon;Joo, Jin-Soo
    • Macromolecular Research
    • /
    • v.17 no.7
    • /
    • pp.491-498
    • /
    • 2009
  • New $\pi$-conjugated multi-branched molecules were synthesized through the Homer-Emmons reaction using alkyl-substituted, 3,4-ethylenedioxythiophene-based, thiophenyl aldehydes and octaethyl benzene-l,2,4,5-tetrayltetrakis(methylene) tetraphosphonate as the core unit; these molecules have all been fully characterized. The two multi-branched conjugated molecules exhibited excellent solubility in common organic solvents and good self-film forming properties. The semiconducting properties of these multi-branched molecules were also evaluated in organic field-effect transistors (OFET). With octyltrichlorosilane (OTS) treatment of the surface of the $SiO_2$ gate insulator, two of the crystalline conjugated molecules, 7 and 8, exhibited carrier mobilities as high as $2.4({\pm}0.5){\times}10^{-3}$ and $1.3({\pm}0.5){\times}10^{-3}cm^2V^{-1}s^{-1}$, respectively. The mobility enhancement of OFET by light irradiation ($\lambda$ = 436 nm) supported the promising photo-controlled switching behavior for the drain current of the device.

Fabrication of Photo Sensitive Graphene Transistor Using Quantum Dot Coated Nano-Porous Graphene

  • ;Lee, Jae-Hyeon;Choe, Sun-Hyeong;Im, Se-Yun;Lee, Jong-Un;Bae, Yun-Gyeong;Hwang, Jong-Seung;Hwang, Seong-U;Hwang, Dong-Mok
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2013.02a
    • /
    • pp.658-658
    • /
    • 2013
  • Graphene is an attractive material for various device applications due to great electrical properties and chemical properties. However, lack of band gap is significant hurdle of graphene for future electrical device applications. In the past few years, several methods have been attempted to open and tune a band gap of graphene. For example, researchers try to fabricate graphene nanoribbon (GNR) using various templates or unzip the carbon nanotubes itself. However, these methods generate small driving currents or transconductances because of the large amount of scattering source at edge of GNRs. At 2009, Bai et al. introduced graphene nanomesh (GNM) structures which can open the band gap of large area graphene at room temperature with high current. However, this method is complex and only small area is possible. For practical applications, it needs more simple and large scale process. Herein, we introduce a photosensitive graphene device fabrication using CdSe QD coated nano-porous graphene (NPG). In our experiment, NPG was fabricated by thin film anodic aluminum oxide (AAO) film as an etching mask. First of all, we transfer the AAO on the graphene. And then, we etch the graphene using O2 reactive ion etching (RIE). Finally, we fabricate graphene device thorough photolithography process. We can control the length of NPG neckwidth from AAO pore widening time and RIE etching time. And we can increase size of NPG as large as 2 $cm^2$. Thin CdSe QD layer was deposited by spin coatingprocess. We carried out NPG structure by using field emission scanning electron microscopy (FE-SEM). And device measurements were done by Keithley 4200 SCS with 532 nm laser beam (5 mW) irradiation.

  • PDF

Characterization of gate oxide breakdown in junctionless amorphous InGaZnO thin film transistors (무접합 비정질 InGaZnO 박막 트랜지스터의 게이트 산화층 항복 특성)

  • Chang, Yoo Jin;Seo, Jin Hyung;Park, Jong Tae
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.22 no.1
    • /
    • pp.117-124
    • /
    • 2018
  • Junctionless amorphous InGaZnO thin film transistors with different film thickness have been fabricated. Their device performance parameters were extracted and gate oxide breakdown voltages were analyzed with different film thickness. The device performances were enhanced with increase of film thickness but the gate oxide breakdown voltages were decreased. The device performances were enhanced with increase of temperatures but the gate oxide breakdown voltages were decreased due to the increased drain current. The drain current under illumination was increased due to photo-excited electron-hole pair generation but the gate oxide breakdown voltages were decreased. The reason for decreased breakdown voltage with increase of film thickness, operation temperature and light intensity was due to the increased number of channel electrons and more injection into the gate oxide layer. One should decide the gate oxide thickness with considering the film thickness and operating temperature when one decides to replace the junctionless amorphous InGaZnO thin film transistors as BEOL transistors.

Modulation of electrical properties of GaN nanowires (GaN 나노선의 전기적 특성제어)

  • Lee, Jae-Woong;Ham, Moon-Ho;Myoung, Jae-Min
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2007.06a
    • /
    • pp.11-11
    • /
    • 2007
  • 1차원 구조체인 반도체 나노선은 앙자제한효과 (quantum confinement effect) 등을 이용하여 고밀도/고효율의 소자 개발이 기대되고 있다. GaN는 상온에서 3.4 eV의 밴드갭 에너지를 갖는 III-V 족 반도체 재료로써 박막의 경우 광전자 소자로 폭넓게 응용되고 있다. 최근 GaN 나노선의 합성에 성공하면서 발광소자, 고효율의 태양전지, HEMT 등으로의 응용을 위한 많은 연구가 활발히 이루어지고 있다. 하지만, 아직까지 GaN 나노선의 전기적 특성을 제어하는 기술은 확립되지 않고 있다. 본 연구에서는 Vapor solid (VS)법을 이용하여 GaN 나노선을 합성하였으며, GaN 분말과 함께 $Mg_2N_3$ 분말을 첨가하여 (Ga,Mg)N 나노선을 성공적으로 합성하였다. 합성시에 GaN와 Mg 소스간의 거리 변화를 통해 Mg 도핑농도를 제어하고자 하였다. 이 같은 방법으로 합 된 (Ga,Mg)N 나노선의 Mg 도핑농도에 따른 결정학적 특성을 알아보고, (Ga,Mg)N 나노선을 이용하여 소자를 제작한 후 그 전기적 특성을 살펴보고자 한다. X-ray diffraction (XRD)과 high-resolution transmission electron microscopy (HRTEM), EDX를 이용하여 합성된 나노선의 결정학적 특성과 Mg의 도핑 농도를 확인하였다. Photo lithography와 e-beam lithography법을 이용하여 (Ga,Mg)N 나노선 field-effect transistor (FET)를 제작하고, channel current-drain voltage ($I_{ds}-V_{ds}$) 와 channel current-gate voltage ($I_{ds}-V_g$) 측정을 통해 (Ga,Mg)N 나노선이 도핑 농도에 따라 n형에서 p형으로 전기적 특성이 변화함을 확인하였다.

  • PDF