Browse > Article
http://dx.doi.org/10.6109/jkiice.2018.22.1.117

Characterization of gate oxide breakdown in junctionless amorphous InGaZnO thin film transistors  

Chang, Yoo Jin (Department of Electronic Engineering, Incheon National University)
Seo, Jin Hyung (Department of Electronic Engineering, Incheon National University)
Park, Jong Tae (Department of Electronic Engineering, Incheon National University)
Abstract
Junctionless amorphous InGaZnO thin film transistors with different film thickness have been fabricated. Their device performance parameters were extracted and gate oxide breakdown voltages were analyzed with different film thickness. The device performances were enhanced with increase of film thickness but the gate oxide breakdown voltages were decreased. The device performances were enhanced with increase of temperatures but the gate oxide breakdown voltages were decreased due to the increased drain current. The drain current under illumination was increased due to photo-excited electron-hole pair generation but the gate oxide breakdown voltages were decreased. The reason for decreased breakdown voltage with increase of film thickness, operation temperature and light intensity was due to the increased number of channel electrons and more injection into the gate oxide layer. One should decide the gate oxide thickness with considering the film thickness and operating temperature when one decides to replace the junctionless amorphous InGaZnO thin film transistors as BEOL transistors.
Keywords
InGaZnO thin film transistor; Junctionless transistor; Gate oxide breakdown voltage; Thin film thickness;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
연도 인용수 순위
1 S. Lee, M. Mativenga, J. Jang, "Removal of negative bias illumination stress instability in amorphous InGaZnO thin film transistors by top gate offset structure," IEEE Electron Device Letters, vol. 35, no. 9, pp. 930-932, June 2014.   DOI
2 M.P. hung, D. Wang, J. Jiang, M. furuta, "Negative bias and illumination stress induced electron trapping at back channel interface of InGaZnO thin film transistors," ECS Solid State Letters, vol. 3, no. 3, pp. Q13-Q16, January 2014.   DOI
3 M.J. Yu, R.P. Lin, Y.H. Chang, T.H. Hou, "High voltage amorphous InGaZnO TFT with $Al_2O_3$ high-K dielectric for low temperature monolithic 3-D integration," IEEE Transactions on Electron Devices, vol. 63, no. 10, pp. 3944-3949, October 2014.   DOI
4 D. Jay, S.S. Cheng, C.Y. Yang, C.W. Ou, Y.C. Chung, M.C. Wu, C.W. Chu, "Dependence of channel thickness on the performance of $In_2O_3$ thin film transistors," Journal of Physics D: Applied Physics, vol. 41, pp. 09006-09015, March 2008.
5 J.F. Verweij, J.H. Klootwijk, "Dielectric breakdown I: A review of oxide breakdown," Microelectronics Journal, vol. 27, no. 7, pp. 611-622, July 1996.   DOI
6 C.C. Chen, C.Y. Chang, C.H. Chien, T.Y. Huang, "Temperature accelerated dielectric breakdown in ultrathin gate oxides," Applied Physics Letters, vol. 74, no. 24, pp. 3708-3710, April 1999.   DOI
7 J.S. Jeon, S.H. Jo, H.J. Choi, J.T. Park, "Effect of thin film thickness on device instability of amorphous InGaZnO junctionless transistors," Journal of the Korean Institute of Informantion and Communication Engineering, vol. 21, no. 9, pp. 1627-1634, September 2017.
8 K. Hatasako, N. Tetsuya, M. Hane, S. Maegawa, "Past and future technology for Mixed signal LSI," IEICE Transaction Electron, vol.E97-C, no.4, pp. 238-244, April 2014.   DOI
9 T. Y. Hsieh, T. C. Chang, T. C. Chen, and M. Y. Tsai, "Review of Present Reliability Challenges in Amorphous In-Ga-Zn-O Thin Film Transistors," ECS Journal of Solid State Science and Technology, vol.3, no. 9, pp. Q3058-Q3070, August 2014.   DOI
10 T. Onuki, W. Uesugi, A. Isobe, Y. Ando, S. Okamoto, K. Kato, T.R., Yew, J.Y. Wu, C.C. Shuai, S.H. Wu, J. Myers, K. Doppler, M. Fujita, S. Yamazaki, "Embeded memory and ARM cortex-M0 core using 60nm C-axis aligned crystalline Indium-Gallium_Zinc Oxide FET integrated with 65nm Si CMOS," IEEE Journal of Solid-State Circuits, vol.52, no.4, pp. 925-932, April 2017.   DOI
11 L.J.Chi, M.J. Yu, Y.H. Chang, T.H. Hou, "1-V full swing depletion load a-In-Ga-Zn-O inverters for back- end-of-line compatible 3D integration," IEEE Electron Device Letters, vol. 37, no. 4, pp. 441-443, April 2016.   DOI
12 C.W. Lee, I. Ferain, A. Afzalian, R. Yan, N. D. Akhavan, P. Razavi, and J.P. Colinge, "Performance estimation of junctionless multigate transistors," Solid-State Electronics, vol. 54, pp. 97-103, February 2010.   DOI
13 K. Kaneko, H. Sunamura, M. Narihiro, S. Saito, N. Furutake, M. Hane, Y. Hayashi, "Operation of functional circuit elements using BEOL transistor with InGaZnO channel for on-chip high/low voltage bridging I/O and high current switches," Symposium on VLSI Technology Digest of Technical Papers, Honolulu, pp. 123-124, June 2012.
14 H. Sunamura, K. Kaneko, N. Furutake, N. Ikarashi, M. Hane, Y. Hayashi, "High On/Off ratio P-type oxide based transistors integrated onto Cu interconnects for on-chip high/low voltage bridging BEOL CMOS I/O," IEEE International Electron Devices Meeting, San francisco, pp. 447-450, December 2012.
15 J.P. Colinge, C.W. Lee, A. Afzalian, N. D. Akhavan, R. Yan, I. Ferain, P. Razavi, B. Oneill, A. Blake, M. White, A.M. Kelleher, B. McCarthy, and R. Murphy, "Nanowire transistor without junction," Nature Nanotecnology, vol. 5, no. 3, pp. 225-229, March 2010.   DOI
16 S.M. Kim, C.G. Yu, W.J, Cho, J.T. Park, "Device characterization and design guideline of amorphous InGaZnO junctionless thin film transistors," IEEE Transactions on Electron Devices, vol. 64, no. 6, pp. 2526-2532, June 2017.   DOI
17 J. Zhou, G. Wu, L. Guo, L. Zhu, and Q. Wan, "Flexible transparent junctionless TFTs with oxygen-tuned Indium-Zinc-Oxide channels," IEEE Electron Device Letters, vol. 34, no. 2, pp. 888-890, February 2013.   DOI
18 X. Ding, J. Zhang, . Li, H. Zhang, W. Shi, X. Jiang, Z, Zhang, "Influence of the InGaZnO channel layer thickness on the performance of thin film transistors," Superlattice and Microstructures, vol. 63, pp. 70-78, August 2013.   DOI
19 C. Chen, K. Abe, H. Kunomi, J. Kanicki, "Density of state of a-InGaZnO from temperature dependent field effect studies," IEEE Transactions on Electron Devices, vol. 56, no. 6, pp. 1177-1181, June 2009.   DOI
20 M. Nakata, H. Tsuji, H. sao, Y. Nakajima, Y. Fujisaki, T. Takei, T. Yamamoto, and H. Fujikako, "Influence of oxide semiconductor thickness on thin-film transistor characteristics," Japanese Journal of Applied Physics, vol. 52, pp. 03BB04-1-5, March 2013.   DOI
21 J. Martins, P. bahubalindrrun, A. Rovisco, A. Kiazadeh, R. Martins, E. Fortunato, P. Barquinha, "Bias stress and temperature impact on InGaZnO TFTs and circuits," Materials, vol. 10, pp. 680-689, June 2017.   DOI