• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.13-17
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• 2006

Pentacene channel for organic thin film transistor was deposited on the SiOC film by thermal evaporation. The growth of pentacene is related with the Diels-Alder reaction and the nucleophilic reaction by the thermal induction. The surface is an important factor to control the recursive Diels-Alder reaction for growing of pentacene on SiOC far The terminal C=C double bond of pentacene molecule was broken easily as a result of attack of the nucleophilic reagents on the surface of SiOC film. The nucleophilic reaction can be accelerated by increasing temperature on surface, and it maks pentacene to grow hardly on the SiOC film with a flow rate ratio of $O_2/(BTMSM+O_2)=0.5$ due to its inorganic property. The nucleophlic reaction mechanism is $SN_2(bimolecular nucleophilic substitution)$ type.

• Applied Science and Convergence Technology
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• v.25 no.2
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• pp.28-31
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• 2016

The structural and the electronic properties of pentacene on modified Si (001) were investigated using scanning tunneling microscopy (STM), atomic force microscopy (AFM) and ultraviolet photoelectron spectroscopy (UPS). Dodecane was used to modify Si (001) substrates and then pentacene was deposited on dodecane/Si (001). Our STM results show a uniform distribution of aggregated dodecane molecules all over the clean Si (001). The surface structure of pentacene on dodecaene/Si (001) examined by AFM is analogous to that of pentacene on $SiO_2$. The UPS data showed that the work function of pentacene on clean Si (001) and pentacene on modified Si (001) with dodecane was 6.41 and 5.57 eV, respectively. Our results prove that dodecane results in the work function difference between pentacene on clean Si (001) and pentacene on dodecane/Si (001).

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.09a
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• pp.63-67
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• 2005

Pentacene channel OTFT(organic thin film transistor)을 SiOC 절연박막 위에서 film by thermal evaporation 방법을 이용하여 성장시켰다. CVD 방법으로 증착시킨 SiOC 절연막은 조성비에 따라 특성이 달라지므로 절연막 위에서의 펜타센의 화학적 반응을 조사하기 위해서 inorganic-type인 $O_2/(BTMSM\;+\;O_2)$ = 0.5의 비율을 갖는 SiOC 박막을 사용하였다. 팬타센 분자의 말단에서 SiOC 표면에서 Diels-Alder 반응에 의한 이중결합이 깨어지면서 안정된 성장을 하지만 온도가 높아감에 따라 표면에서의 $SN_2$(bimolecular nucleophilic substitution) 반응과 연쇄적인 화학반응에 의해 팬타센의 성장을 방해하는 것으로 나타났다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.3
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• pp.177-182
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• 2010

The pentacene-based organic thin film transistors(OTFTs) using polyvinylalcohol(PVA) alignment layer were fabricated on the $SiO_2$ evaporated to n-type (111) Si substrates. The pentacene film was deposited by thermally evaporated at $10^{-7}$ torr. X-ray diffraction (XRD) and atomic force microscope(AFM) measurement showed pentacene film which deposited on rubbed PVA layers were partially crystallized at (001) plane. The pentacene OTFTs with PVA layers rubbed perpendicular to the direction of current flow was shown to align better orientation than parallel rubbed case and thus to enhance the mobility and saturation current by a factor of 2.3 respectively. We obtained mobility by 0.026 $cm^2$/Vs and on-off current ratio by ${\sim}10^8$.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1277-1278
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• 2008

Pentacene 박막 트랜지스터의 소스/드레인 전극을 폴리머인 Poly(3,4-ethylene dioxythiophene) poly(styrenesulfonate) (PEDOT:PSS)를 사용하여 잉크젯 프린팅 방법으로 제작하였다. 펜타신 박막 트랜지스터는 열 증착법을 사용하여 폴리며 기판위에 100nm의 두께로 증착하였다. 게이트 절연막은 $SiO_2$ 위에 Polymethly Methacrylate (PMMA)를 증착시킨 double layer를 사용하였다. PMMA 위에 증착시킨 pentacene 결정립이 $SiO_2$ 위에 증착한 pentacene 결정립 보다 크게 성장하였고, double layer의 절연막을 씀으로 인해 게이트 누설 전류가 감소함을 보였다. Pentacene 증착 온도에 따른 결정립 크기를 비교하여 가장 적절한 온도를 찾았다. 프린팅 방법을 사용하여 만든 박막 트랜지스터는 전계효과 이동도가 ${\mu}_{FET}=0.023cm^2/Vs$ 이고, 문턱이전 기울기 S.S=0.49V/dec, 문턱전압 $V_{th}=-18V$, $I_{on}/I_{off}$ 전류비 >$10^3$의 전기적 특성을 보였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.18-22
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• 2006

The inspection of surface properties under n-octadecyltrichlorosilane treated $SiO_2$ film was carried out by current-voltage characteristic and the scanning electron microscope. The voltage at zero current in low electric field is the lowest at 0.3 % OTS treated $SiO_2$ film with hybrid type. $SiO_2$ films changed from inorganic to hybrid or organic properties according to the increase of OTS content. OTS treated $SiO_2$ films with hybrid properties decreased the leakage currents, and the grain size of pentacene deposited sample was also the most small at the hybrid properties. The perpendicular generation of pentacene molecular was related with the surface of insulators. The surface with hybrid properties decreased the grain size, but that with inorganic or organic properties increased the grain size.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.161-168
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• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• Journal of Adhesion and Interface
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• v.20 no.4
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• pp.155-161
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• 2019

Understanding charge transport anisotropy at the interface of conjugated nanostructures basically gives insight into structure-property relationship in organic field-effect transistors (OFET). Here, the anisotropy of the field-effect mobility at the interface between 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) single crystal with cofacial molecular stacks in a-b basal plane and SiO gate dielectric was investigated. A solvent exchange method has been used in order for TIPS-pentacene single crystals to be grown on the surface of SiO₂ thin film, corresponding to the charge accumulation at the interface in OFET structure. In TIPS-pentacene OFET, the anisotropy ratio between the highest and lowest measured mobility is revealed to be 5.2. By analyzing the interaction of a conjugated unit in TIPS-pentacene with the nearest neighbor units, the mobility anisotropy can be rationalized by differences in HOMO-level coupling and hopping routes of charge carriers. The theoretical estimation of anisotropy based on HOMO-level coupling is also consistent with the experimental result.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1748-1750
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• 2000

There are currently considerable interests in the applications of conjugated polymers, oligomers. and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field-effect transistors and light-emitting diodes. In this study we fabricated the devices based on pentacene as active layer. Octadecyltrichlorosilane (OTS) is used as buffer layer between $SiO_2$ and pentacene. Atomic force microscopy (AFM), X-ray diffraction (XRD), and electrical conductivity were used with OTS on $SiO_2$ 10nm which the pentacene layer was thermally evaporated in vacuum at a pressure of about $2.0\times10^{-6}$ Torr. In the result of AFM, the grain length is grown by using OTS for surface treatment. Electrical conductivity is changed from $3.19{\times}10^{-6}$ S/cm to $2.12{\times}10^{-7}$ S/cm. We observed that electrical conductivity is also increased by surface treatment. According to these results, the surface treated devices exhibited the increase to compared no treatment.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.972-973
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• 2007

Relationships between field effect mobility and grain size on pentacene thin-film transistors with $polyimide/SiO_2$ gate dielectrics have been studied. 6 kinds of polyimide were used as surface treatment gate dielectric layer. Grain size of the pentacene thin film were between 5 and $30\;{\mu}m$ and depended on the polyimide. The field effect mobility were also depended on the polyimide and the those values were from 0.027 to $0.69\;cm^2/(Vs)$. The field effect mobility tends to increase with increasing the grain size. Precursor type polyimide containing polyamic acid show better mobility of $0.69\;cm^2/(Vs)$ than soluble type polyimide. Bias stress characteristics in air are discussed in the basis of the grain size.