• Title/Summary/Keyword: Parasitic Component

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Analysis of Switch Driving Gate Signal by Parasitic Component (스위치 구동 시 기생성분에 따른 게이트 신호 분석)

  • Chae, Hun-Gyu;Kim, Dong-Hee;Kim, Min-Jung;Park, Sang-Min;Lee, Byoung-Kuk
    • Proceedings of the KIPE Conference
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    • 2015.07a
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    • pp.459-460
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    • 2015
  • 본 논문에서는 2개의 MOSFET으로 구성된 Half-bridge 회로를 구동할 때, 각 MOSFET의 기생성분을 고려하여 게이트 신호를 분석한다. 특히 MOSFET 구동시 게이트 전압에 따른 구간별 등가회로를 구성, 각 구간에서 다른 MOSFET에 상호적으로 미치는 영향을 수식적으로 분석하고, 시뮬레이션을 통해 스위칭 특성을 검증한다.

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Characteristic of Cabin Temperature According to Thermal Load Condition of Heat Pump for Electric Vehicle (전기자동차용 히트펌프의 열 부하 조건에 따른 캐빈온도 특성)

  • Park, Ji Soo;Han, Jae Young;Kim, Sung-Soo;Yu, Sang Seok
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.40 no.2
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    • pp.85-91
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    • 2016
  • The Positive Temperature Coefficient (PTC) is used for cabin air heating of a battery electric vehicle, which is different from conventional vehicles. Since the PTC heater consumes a large quantity of power in a parasitic manner, many valuable studies have been reported in the field of alternative heat pumps. In this study, a model for an R134a heat pump taking into account the thermal environment of the cabin was developed for a MATLAB/SIMULINK(R) platform. Component and cabin models are validated with reference values. Results show that the heat pump is more competitive for parasitic power consumption over all ambient temperature conditions. Additionally, the method of waste heat recovery to overcome disadvantages when temperatures are below zero is applied to efficiently operate the heat pump.

Gate length scaling behavior and improved frequency characteristics of In0.8Ga0.2As high-electron-mobility transistor, a core device for sensor and communication applications (센서 및 통신 응용 핵심 소재 In0.8Ga0.2As HEMT 소자의 게이트 길이 스케일링 및 주파수 특성 개선 연구)

  • Jo, Hyeon-Bhin;Kim, Dae-Hyun
    • Journal of Sensor Science and Technology
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    • v.30 no.6
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    • pp.436-440
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    • 2021
  • The impact of the gate length (Lg) on the DC and high-frequency characteristics of indium-rich In0.8Ga0.2As channel high-electron mobility transistors (HEMTs) on a 3-inch InP substrate was inverstigated. HEMTs with a source-to-drain spacing (LSD) of 0.8 ㎛ with different values of Lg ranging from 1 ㎛ to 19 nm were fabricated, and their DC and RF responses were measured and analyzed in detail. In addition, a T-shaped gate with a gate stem height as high as 200 nm was utilized to minimize the parasitic gate capacitance during device fabrication. The threshold voltage (VT) roll-off behavior against Lg was observed clearly, and the maximum transconductance (gm_max) improved as Lg scaled down to 19 nm. In particular, the device with an Lg of 19 nm with an LSD of 0.8 mm exhibited an excellent combination of DC and RF characteristics, such as a gm_max of 2.5 mS/㎛, On resistance (RON) of 261 Ω·㎛, current-gain cutoff frequency (fT) of 738 GHz, and maximum oscillation frequency (fmax) of 492 GHz. The results indicate that the reduction of Lg to 19 nm improves the DC and RF characteristics of InGaAs HEMTs, and a possible increase in the parasitic capacitance component, associated with T-shap, remains negligible in the device architecture.

Influence of Environmental Factors on the Prevalence of the Ovarian Parasite, Marteilioides chungmuensis, in Crassostrea gigas, Cultured in Pukman Bay, Tongyeong (양식환경이 통영 북만의 참굴, Crassostrea gigas에 기생하는 난소기생충, Marteilioides chungmuensis 감염에 미치는 영향)

  • Jeong, Woo-Geon;Seo, Jeong-Hwa;Cho, Sang-Man;Park, Chan-Il
    • The Korean Journal of Malacology
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    • v.21 no.1
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    • pp.33-40
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    • 2005
  • Occurrence and prevalence of Marteilioides chungmueasis have been reported in several waters around Tongyeong but no report has been made for Pukman bay. Therefore, we investigated that the prevalence and infection intensities in Pukman Bay at the inside and the outside areas which are hydrographically divided by tidal current. Furthermore, various environmental parameters were investigated in order to elucidate effective parameter for parasitic infection. Infection rates of Marteilioides chungmuensis in adult oysters were ranged 3.3-20.0% at the inside area during September 2002 through January 2003, and 3.3-30.9% at the outside area during August 2002 through January 2003. External manifestation of infected oyster consisted of abnormal egg masses with nodular appearance in the soft tissue. Histopathological symptoms included massive hemocytic infiltration within or around the follicle wall and atrophic epithelium of digestive diverticula. For the environmental parameters, comparative study made differences between two side of the Bay during the infection period: inside > outside for SS while inside < outside for chlorophyll-a. A positive relationship was observed between chlorophyll-a and infection period, which might indicate the difference in food availability between two areas. The prevalence of ovarian parasite Marteilioides chungmuensis, therefore, was highly associated with food availability. Pearson's correlation analysis was made between environmental parameters and infection prevalence. Significance was observed in water temperature (p < 0.05), suspended solids (p < 0.01) and chlorophyll-a (p < 0.05). A principle component analysis showed that infection of the ovarian parasite, Marteilioides chungmuensis, exhibited effects of seasonality (component I = 55.2%) and chemical/physical environmental factors (component II = 24.4%). These results clearly indicate that the infection of ovarian parasite, M. chungmuensis in the Pacific oyster Crassostrea gigas is closely associated with seasonality and food availability.

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Parametric studies on convection during the physical vapor transport of mercurous chloride ($Hg_2Cl_2$)

  • Kim, Geug-Tae;Lee, Kyong-Hwan
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.14 no.6
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    • pp.281-289
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    • 2004
  • The temperature hump is found to be most efficient in suppressing parasitic nucleation. With the temperature humps, there are found to be observed in undersaturations along the transport path for convective-diffusive processes ranging from $D_{AB}$ = 0.0584 $\textrm{cm}^2$/s to 0.584 $\textrm{cm}^2$/s, axial positions from 0 to 7.5 cm. With decreasing Ar = 5 to 3.5, the temperature difference is increased because of the imposed nonlinear temperature profile but the rate is decreased. For 2 $\leq$ Ar $\leq$ 3.5, the rate is increased with the aspect ratio as well as the temperature difference. Such an occurrence of a critical aspect ratio is likely to be due to the effect of sidewall and much small temperature difference. The rate is decreased exponentially with the aspect ratio for 2 $\leq$ Ar $\leq$ 10. Also, the rate is exponentially decreased with partial pressure of component B, P for 1 $\leq$ P $\leq$ 100 Torr.$ B/ $\leq$ 100 Torr.

Broadband Mixer with built-in Active Balun for Dual-band WLAN Applications (이중대역 무선랜용 능동발룬 내장 광대역 믹서 설계)

  • Lee, Kang-Ho;Koo, Kyung-Heon
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.261-264
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    • 2005
  • This paper presents the design of a down-conversion mixer with built-in active balun integrated in a $0.25\;{\mu}m$ pHEMT process. The active balun consists of series-connected common-gate FET and common-source FET. The designed balun achieved broadband characteristics by optimizing gate-width and bias condition for the reduction in parasitic effect. From DC to more than 6GHz, the active balun shows the phase error of less than 3 degree and the gain error of less than 0.4 dB. A single-balanced down-conversion mixer with built-in broadband active balun has been designed with optimum width, load resistor and bias for conversion gain and without any matching component for broadband operating. The designed mixer whose size of including on-chip bias circuit is $1\;mm{\times}1\;mm$ shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz and $P_{1dB}$ of -10 dBm at 5.8 GHz

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A Development of Jig Circuit for Performance Evaluation of an Oscillator (발진기의 성능평가를 위한 지그 회로의 개발)

  • Lin, Chi-Ho;Yoon, Dal-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.11
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    • pp.95-101
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    • 2008
  • We have used diversely the multilayer ceramic oscillator of the SMD(Surface Mounted Device) package technology that connects the crystal with the chip package. Such an oscillator occurs a stray inductance and a parasitic capacitance by the length and inner pattern. And it has been happened an amplitude attenuation and signal loss due to the reflection of power source and noise component. So we don't evaluate the precise performance of the oscillator for these factors. In this paper we have developed the Jig system to evaluate the performance of the oscillator. Through this system, we will expect an advanced performance of the oscillator and redesign an oscillator of the low jitter characteristics and low phase noise.

Spectral Analysis and Performance Evaluation of VCXO using the Jig System (지그시스템을 이용한 VCXO의 스펙트럼 분석 및 성능평가)

  • Yoon Dal-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.43 no.4 s.310
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    • pp.45-52
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    • 2006
  • In his paper, we have developed the SMD(surface mounted device) type PECL(positive emitter-coupled logic) VCXO of the $5{\times}7mm$ size for gratifying the requested specifications and the multilayer ceramic SMD(surface mounted device) package technology. The VCXO wired with the PECL(positive emitter coupled logic) package take place a stray inductance and a parasitic capacitance by the length and the inner pattern of the VCXO and the amplitude attenuation and signal loss due to the reflection of power source and the noise component. We have developed the Zig system to analyze the precise spectrum and evaluate the performance. The basic operating voltage is the 3.3 V and have the frequency range of 120MHz-180MHz. The Q factor is over 5K and it has the low jitter characteristics of 3.5 ps and low phase noise.

Composite $BaTiO_3$ Embedded capacitors in Multilayer Printed Circuit Board (다층 PCB에서의 $BaTiO_3$ 세라믹 Embedded capacitors)

  • You, Hee-Wook;Park, Yong-Jun;Koh, Jung-Hyuk
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.17 no.2
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    • pp.110-113
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    • 2008
  • Embedded capacitor technology is one of the effective packing technologies for further miniaturization and higher performance of electric packaging system. In this paper, the embedded capacitors were simulated and fabricated in 8-layered printed circuit board employing standard PCB processes. The composites of barium titanante($BaTiO_3$) powder and epoxy resin were employed for the dielectric materials in embedded capacitors. Theoretical considerations regarding the embedded capacitors have been paid to understand the frequency dependent impedance behavior. Frequency dependent impedance of simulated and fabricated embedded capacitors was investigated. Fabricated embedded capacitors have lower self resonance frequency values than that of the simulated embedded capacitors due to the increased parasitic inductance values. Frequency dependent capacitances of fabricated embedded capacitors were well matched with those of simulated embedded capacitors from the 100MHz to 10GHz range. Quality factor of 20 was observed and simulated at 2GHz range in the 10 pF embedded capacitors. Temperature dependent capacitance of fabricated embedded capacitors was presented.

A Study on Implementing a Phase-Shift Full-Bridge Converter Employing an Asynchronous Active Clamp Circuit

  • Lee, Yong-Chul;Kim, Hong-Kwon;Kim, Jin-Ho;Hong, Sung-Soo
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.413-420
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    • 2014
  • The conventional Phase-Shift Full-Bridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48V-to-30V/15A prototype.