• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.05a
• /
• pp.159-161
• /
• 2013

Surveillance system that can respond quickly in case of failure to detect various disorders that can occur for a temperature chamber, and fire extinguishing equipment, such as UPS, communication room, and computer room of enterprises and institutions operating in infrastructure, and to systematically study. Major telecommunications equipment and computational facilities to manage, operating in an environment of air conditioners work status, distribution panel and the UPS status and fault status, rapid notification system in case of fire is needed. By identifying the status and problems of disability surveillance on the periphery of the existing computer room's infrastructure management guidelines presented in the next future Conception and systematic surveillance system for staff to refer to when designing considerations associated with data center monitoring system the necessity of the various studies are presented.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.22 no.8
• /
• pp.1068-1075
• /
• 2018

In this paper, a novel PLL has been proposed that reduces the size of the loop filter while suppressing spur by using a VCO with two inputs. Through the stability analysis according to the operating status, the PLL is designed to operate stably after the phase fixing. The capacitor of loop filter usually occupies larger area of PLL. It is a VCO that can reduce the size of the loop filter by increasing the effective capacitance of the capacitor through the simultaneous charge and discharge operation by two charge pumps and has two signals operating in opposite phases. The settling time of set to $80{\mu}s$ approximately by using a LSI(Locking Status Indicator) indicating the phase locking status. The proposed PLL is designed using a supply voltage of 1.8V and a $0.18{\mu}m$ CMOS process.

• Proceedings of the KSR Conference
• /
• 2011.05a
• /
• pp.904-909
• /
• 2011

The development of train control system shall operate a series of processes like system designing, system production and system performance evaluation as a result of various requirements analysis presented in operation rules, operating guidelines for railway organizations etc, notified by the nation. Therefore, considering operation conditions, operation plan, linkage to railway network etc, the major document like system functional specifications, system development specifications, system test plans etc must be drawn up. In this paper we classify system operating scenarios required to prepare for system standard specification and system performance evaluation report of CBTC system for urban subways supporting unmanned automatic operation, and adjust each of the operating status.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.858-862
• /
• 2005

The industry of LCD monitor and LCD/TV production is complicate, so there are several OEM/ODM companies concentrated on technical and professional skills. Brand name company establishes its own brand name, sells its own product, and reflects market request. Therefore, the main duty of brand name company is on sales and marketing. This article explains the operating flow on LCD monitor and LCD/TV industry, operating relationship between brand name company and OEM/ODM, and advantage and disadvantage on different points. Furthermore, future trend of LCD monitor and LCD/TV can be reviewed in the article.

• Proceedings of the KSR Conference
• /
• 2008.06a
• /
• pp.1930-1935
• /
• 2008

Bimodal tram is able to run both general and special road. It has also the advantages of both public bus and subway which have the charateristics of easiness to approach and punctuality respectively. These advantages are accomplished by the cooperative communication between the control center and bimodal tram which is running with the fleet. This paper have investigated the requirement analysis and designing of the car operating computer system which have the functions of communication, broadcasting and display. car operating computer system communicates between bimodal tram and control center with wireless antenna. It can also transmit the location and status information of bimodal tram to control center for managing the bimodal tram fleet on road efficiently and economically.

• Proceedings of the Korean Nuclear Society Conference
• /
• 2004.10a
• /
• pp.501-502
• /
• 2004

• Journal of the Korean Society for Aviation and Aeronautics
• /
• v.17 no.3
• /
• pp.22-31
• /
• 2009

In this study, we surveyed the operating status of the Light Sport Aircraft(LSA) in Korea, and reviewed the flight route design for Light Sport Aircraft in Korea.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.3
• /
• pp.582-586
• /
• 2005

This paper presents a new structure of Phase Locked Loop(PLL) which changes its loop bandwidth according to the locking status. The proposed PLL consists of a conventional PLL and, Locking Status Indicator(LSI). The LSI decides the operating bandwidth of loop filler. When the PLL becomes out of lock, the PLL increases the loop bandwidth and achieves fast locking. When the PLL becomes in-lock, this PLL decreases the loop bandwidth and minimizes phase noise output. The PLL can achieve fast locking and low phase noise output at the same time. Proposed PLL's locking time is less than $40{\mu}s$ and spur is 76.1dBc. It is simulated by HSPICE in a Hynix CMOS $0.35{\mu}m$ Process.

• Journal of information and communication convergence engineering
• /
• v.3 no.3
• /
• pp.142-145
• /
• 2005

In this paper, a new programmable DLL (delay locked loop) based clock synthesizer is proposed. DLL has several inherent advantages, such as no phase accumulation error, fast locking and easy integration of the loop filter. This paper proposes a new programmable DLL that includes a PFD(phase frequency detector), a LSI(lock status indicator), and a VCDL(voltage controlled delay line) to generate multiple clocks. It can generate clocks from 3 to 9 times of input clock with $2{\mu}s$ locking time. The proposed DLL operating in the frequency range of 300MHZ-900MHz is verified by the HSPICE simulation with a $0.35{\mu}m$ CMOS process.

• Journal of Multimedia Information System
• /
• v.6 no.4
• /
• pp.323-328
• /
• 2019

In this paper, a method of constructing an advanced sequential circuit over finite fields is proposed. The method proposed an algorithm for assigning all elements of finite fields to digital code from the properties of finite fields, discussed the operating characteristics of T-gate used to construct sequential digital system of finite fields, and based on this, formed sequential circuit without trajectory. For this purpose, the state transition diagram was allocated to the state dependency code and a whole table was drawn showing the relationship between the status function and the current state and the previous state. The following status functions were derived from the status function and the preceding table, and the T-gate and the device were used to construct the sequential circuit. It was confirmed that the proposed method was able to organize sequential digital systems effectively and systematically.