• Journal of Power Electronics
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• 제18권5호
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• pp.1458-1469
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• 2018

This paper proposes a novel common-mode voltage (CMV) elimination (CMV-EL) method based on model predictive control (MPC) to eliminate CMV for three-level T-type inverters (3LT2Is). In the proposed MPC method, only six medium and one zero voltage vectors (VVs) (6MV1Z) that generate zero CMV are considered as candidates to perform the MPC. Moreover, the influence of dead-time effects on the CMV of the MPC-based 6MV1Z method is investigated, and the candidate VVs are redesigned by pre-excluding the VVs that will cause CMV fluctuations during the dead time from 6MV1Z. Only three or five VVs are included to perform optimization in every control period, which can significantly reduce the computational complexity. Thus, a small control period can be implemented in the practical applications to achieve improved grid current performance. With the proposed CMV-EL method, the CMV of the $3LT^2Is$ can be effectively eliminated. In addition, the proposed CMV-EL method can balance the neutral point potentials (NPPs) and yield satisfactory performance for grid current tracking in steady and dynamic states. Simulation and experimental results are presented to verify the effectiveness of the proposed method.

• Journal of Power Electronics
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• 제19권3호
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• 전기학회논문지
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• 제65권2호
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• pp.311-318
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• 2016

This paper is a study on the neutral point voltage balancing of the three-phase 3-level T-type inverter using the predictive control techniques. Recently, multi-level inverter has been attracting attention as the advantages such as efficiency improving and harmonic reduction. Especially, the T-type inverter topology is advantageous in low DC-link voltage. However, in case of the prediction control, it takes a lot of time, because there exist 27 voltage vectors and it has to be calculated according to the respective voltage vectors. Therefore, in this paper, we propose a method to implement predictive control techniques while reducing the operation time. In order to reduce the operation time, the predictive control is implemented by using the minimum voltage vector except for the unnecessary voltage vector. The result of the implemented predictive control is added to the SPWM by using the offset voltage. It was verified through simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• 제2권4호
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• pp.505-512
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• 2007

The object of this paper is to study a new control structure for sensorless induction machines dedicated to electrical drives using a three-level voltage source inverter VSI-NPC. The amplitude and the rotating speed of the flux vector can be controlled freely. The scheme investigated is an Enhanced direct torque control "EDTC" for electric vehicle propulsion. The considered application imposes some constraints which are achieved in EDTC control (fast torque response, optimal switching logic, torque control at zero speed, and large speed control. The results obtained for an induction motor indicate superior performance over the FOC type without need for any mechanical sensor.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.273-274
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• 2012

This paper investigates control algorithms for a doubly fed induction generator(DFIG) with a back-to-back three-level neutral-point clamped voltage source converter in medium voltage wind power system under unbalanced grid conditions. Two different control algorithms to compensate for unbalanced conditions are proposed. Evaluation factors of control algorithm are fault ride-through(FRT) capability, efficiency, harmonic distortions and torque pulsation. Zero regulated negative sequence stator current control algorithm has the most effective performance concerning FRT capability and efficiency. Ripple-free control algorithm nullifies oscillation component of active power and reactive power. Ripple-free control algorithm shows the least harmonic distortions and torque pulsation. Combination of zero regulated negative sequence stator current and ripple-free control algorithm control algorithm depending on the operating requirements and depth of grid unbalance presents the most optimized performance factors under the generalized unbalanced operating conditions leading to high performance DFIG wind turbine system.

• 전력전자학회논문지
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• 제21권1호
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• pp.27-33
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• 2016

A pulse-width modulation (PWM) method for common mode noise reduction in a PWM inverter connected to a single-phase grid is proposed in this study. The extensively used conventional switching method may experience common mode voltage problems, which generate current leakage and electromagnetic induction problems. In the proposed switching method, the neutral point of the output voltage is always fixed at both ends of the input voltage to reduce common mode noise. The validity of the proposed method is proven through simulation and experimental results.

• Journal of Power Electronics
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• 제9권1호
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• pp.43-50
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• 2009

This paper deals with a novel solid state controller (NSSC) for an isolated asynchronous generator (IAG) feeding 3-phase 4-wire loads driven by constant power prime movers, such as uncontrolled pico hydro turbines. AC capacitor banks are used to meet the reactive power requirement of the asynchronous generator. The proposed NSSC is realized using a set of IGBTs (Insulated gate bipolar junction transistors) based current controlled 2-leg voltage source converters (CC- VSC) and a DC chopper at its DC bus, which keeps the generated voltage and frequency constant in spite of changes in consumer loads. The neutral point of the load is created using aT-configuration of the transformers. The IAG system is modeled in MATLAB along with Simulink and PSB (power system block set) toolboxes. The simulated results are presented to demonstrate the capability of the isolated generating system consisting of NSSC and IAG driven by uncontrolled pico hydro turbine and feeding 3-phase 4-wire loads.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2013년도 전력전자학술대회 논문집
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• pp.246-247
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• 2013

This paper investigates control algorithms for a doubly fed induction generator with a back-to-back three-level neutral-point clamped voltage source converter in medium voltage wind power system under unbalanced grid conditions. Control algorithms to compensate for unbalanced conditions have been investigated with respect to four performance factors; fault ride-through capability, instantaneous active power pulsation, harmonic distortions, and torque pulsation. The control algorithm having zero amplitude of torque ripple shows the most cost-effective performance concerning torque pulsation. The least active power pulsation is produced by control algorithm that nullifies the oscillating component of the instantaneous stator active and reactive power. Combination of these two control algorithms depending on the operating requirements and depth of grid unbalance presents most optimized performance factors under the generalized unbalanced operating conditions leading to high performance DFIG wind turbine system. The proposed control algorithms are verified through transient response in the simulation.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.362-371
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• 2018

This work proposes FPGA implementation of Carrier Disposition PWM for closed loop seven level diode clamped multilevel inverter in speed control of induction motor. VLSI architecture for carrier Disposition have been introduced through which PWM signals are fed to the neutral point seven level diode clamped multilevel using which the speed of the induction motor is controlled. This proposed VLSI architecture makes the power circuit to work better with reduced stresses across the switches and a very low voltage and current total harmonic distortion (THD). The output voltages, currents, torque & speed characteristics for seven level neutral point diode clamped multilevel inverter for AC drive was studied. It has observed the proposed scheme introduces less distortion and harmonics. The results were validated using real time results.

• Journal of Power Electronics
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• 제16권3호
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• pp.925-935
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• 2016

This paper proposes a new interleaved double-input three-level Boost (DITLB) converter, which is composed of two boost converters indirectly in series. Thus, a high voltage gain, together with a low component stress and a small input current ripple due to the interleaved control scheme, is achieved. The operating principle of the DITLB converter under the individual supplying power (ISP) and simultaneous supplying power (SSP) mode is analyzed. In addition, closed-loop control strategies composed of a voltage-current loop and a voltage-balance loop, have been researched to make the converter operate steadily and to alleviate the neutral-point imbalance issue. Experimental results verify correctness and feasibility of the proposed topology and control strategies.