• Journal of Power Electronics
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• v.15 no.3
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• pp.685-694
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• 2015

The power loss of the controllable switches in modular multilevel converter (MMC) HVDC transmission systems is an important factor, which can determine the design of the operating junction temperatures. Due to the dc current component, the approximate calculation tool provided by the manufacturer of the switches cannot be used for the losses of the switches in the MMC. Based on the enabled probabilities of each SM in an arm, the current analytical models of the switches can be determined. The average and RMS currents can be obtained from the corresponding current analytical model. Then, the conduction losses can be calculated, and the switching losses of the switches can be estimated according to the upper limit of the switching frequency. Finally, the thermal resistance model of the switches can be utilized, and the junction temperatures can be estimated. A comparison between the calculation and PSCAD simulation results shows that the proposed method is effective for estimating the junction temperatures of the switches in the MMC.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1109-1118
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• 2014

A Fundamental Frequency Sorting Algorithm (FFSA) is proposed in this paper to balance the voltages of floating dc capacitors for Modular Multilevel Converters (MMCs). The main idea is to change the sequences of the CPS-PWM carriers according to the capacitor voltage increments during the previous fundamental period. Excessive frequent sorting is avoided and many calculating resources are saved for the controller. As a result, more sub-modules can be dealt with. Furthermore, it does not need to measure the arm currents. Therefore, the communication between the controllers can be simplified and the number of current sensors can be reduced. Moreover, the proposed balancing method guarantees that all of the switching frequencies of the sub-modules are equal to each other. This is quite beneficial for the thermal design of the sub-modules and the lifetime of the power switches. Simulation and experimental results acquired from a 9-level prototype verify the viability of the proposed balancing method.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1100-1108
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• 2014

Modular multilevel converters (MMCs) have emerged as the most promising topology for high and medium voltage applications for the coming years. However, one particular negative characteristic of MMCs is the existence of circulating current, which contains a dc component and a series of low-frequency even-order ac harmonics. If not suppressed, these ac harmonics will distort the arm currents, increase the power loses, and cause higher current stresses on the semiconductor devices. Repetitive control (RC) is well known due to its distinctive capabilities in tracking periodic signals and eliminating periodic errors. In this paper, a novel circulating current control scheme base on RC is proposed to effectively track the dc component and to restrain the low-frequency ac harmonics. The integrating function is inherently embedded in the RC controller. Therefore, the proposed circulating current control only parallels the RC controller with a proportional controller. Thus, conflicts between the RC controller and the traditional proportional integral (PI) controller can be avoided. The design methodologies of the RC controller and a stability analysis are also introduced. The validity of the proposed circulating current control approach has been verified by simulation and experimental results based on a three-phase MMC downscaled prototype.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1147-1156
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• 2014

This study proposes a quasi-fixed-frequency hysteresis current tracking control strategy for modular multilevel converters (MMCs) on the basis of voltage partition principle. First, by monitoring the grid voltage and the deviation between the output and reference currents, the output voltage is determined, thus prompting the output current to quickly and efficiently track the given current. Second, the voltages of the upper/lower capacitor of the arm and the voltages between the upper and lower arms are balanced by combining these arms with virtual loop mapping and arm voltage balance control, respectively. In particular, the proposed method is designed for any level and number of sub-modules. The validity of the proposed method is verified by simulations and experimental results of a five-level MMC prototype.

• Journal of Power Electronics
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• v.17 no.1
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1706-1715
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• 2016

In this paper, a single phase modified switched-diode topology for both symmetrical and asymmetrical cascaded multilevel inverters is presented. It consists of a Modified Switched-Diode Unit (MSDU) and a Twin Source Two Switch Unit (TSTSU) to produce distinct positive voltage levels according to the operating modes. An additional H-bridge synthesizes a voltage waveform, where the voltage levels of either polarity have less Total Harmonic Distortion (THD). Higher-level inverters can be built by cascading MSDUs. A comparative analysis is done with other topologies. The proposed topology results in reductions in the number of power switches, losses, installation area, voltage stress and converter cost. The Nearest Level Control (NLC) technique is employed to generate the gating signals for the power switches. To verify the performance of the proposed structure, simulation results are carried out by a PSIM under both steady state and dynamic conditions. Experimental results are presented to validate the simulation results.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.448-455
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• 2015

A model predictive control (MPC) method without individual PWM has been recently researched to simplify and improve the control flexibility of a multilevel inverter. However, the input power of each H-bridge cell and the switching frequency of switching devices are unbalanced because of the use of a restricted switching state in the MPC method. This paper proposes a control method for balancing the switching patterns and cell power supplied from each isolated dc source of a cascaded H-bridge inverter. The supplied dc power from isolated dc sources of each H-bridge cells is balanced with the proposed cell balancing method. In addition, the switching frequency of each switching device of the CHB inverter becomes equal. A simulation and experimental results are presented with nine-level and five-level three-phase CHB inverter to validate the proposed balancing method.

• Journal of Power Electronics
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• v.18 no.6
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• pp.1683-1696
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• 2018

Under the conventional control strategy, the asymmetry of arm impedances may result in the poor operating performance of modular multilevel converters (MMCs). For example, fundamental frequency oscillation and double frequency components may occur in the dc and ac sides, respectively; and submodule (SM) capacitor voltages among the arms may not be balanced. This study presents an enhanced control strategy to deal with these problems. A mathematical model of an MMC with asymmetric arm impedance is first established. The causes for the above phenomena are analyzed on the basis of the model. Subsequently, an enhanced current control with five integrated proportional integral resonant regulators is designed to protect the ac and dc terminal behavior of converters from asymmetric arm impedances. Furthermore, an enhanced capacitor voltage control is designed to balance the capacitor voltage among the arms with high efficiency and to decouple the ac side control, dc side control, and capacitor voltage balance control among the arms. The accuracy of the theoretical analysis and the effectiveness of the proposed enhanced control strategy are verified through simulation and experimental results.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1496-1504
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• 2019

This paper proposes a new THD reduction algorithm for modular multilevel converters (MMCs) with offset voltage injection operated in nearest level modulation (NLM). High voltage direct current (HVDC) is actively introduced to the grid connection of offshore wind powers, and this paper deals with a voltage generation technique with an MMC for wind power generation. In the proposed method, third harmonic voltage is added for reducing the THD. The third harmonic voltage is adjusted so that each of the pole voltage magnitudes maintains a constant value with a maximum number of (N+1) levels, where N is the number of sub-modules per arm. By using the proposed method, the THD of the output voltage is mitigated without increasing the switching frequency. In addition, the proposed method has advantageous characteristics such as simple implementation. As a part of this study, this paper compares the THD results of the conventional method and the proposed method with offset voltage injection to reduce the THD. In this paper, simulations have been carried out to verify the effectiveness of the proposed scheme, and the proposed method is implemented by a HILS (Hardware in the Loop Simulation) system. The obtained results show agreement with the simulation results. It is confirmed that the new scheme achieved the maximum level output voltage and improved the THD quality.

• Journal of IKEEE
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• v.23 no.4
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• pp.1140-1149
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• 2019

In general, there are various pulse width modulation(PWM) methods simply using the offset voltage injection in voltage source converter(VSC). In accordance with the AC side voltage synthesis method with the offset voltage, DC side voltage utilization factor in VSC is changed. Also, this can apply equally to the MMC system. In other words, if the DC side capacity of the high voltage DC(HVDC) transmission system is determined, the maximum reactive power which can be supplied to the AC side can be changed according to the applied output voltage synthesis method with the offset voltage. In this paper, the leg energy pulsation in MMC system according to the AC side output voltage synthesis method with offset voltage which several representative PWM are applied to are mathematically analyzed and compared with each other. Finally, the above results are verified by simulation emulating the 400MVA full-scale MMC system to determine the consistency of the mathematical analysis.