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http://dx.doi.org/10.6113/JPE.2017.17.1.115

An Improved Switching Topology for Single Phase Multilevel Inverter with Capacitor Voltage Balancing Technique  

Ponnusamy, Rajan Soundar (Dept. of Electrical & Electronics Engineering, PSNA College of Engineering & Technology)
Subramaniam, Manoharan (Dept. of Electrical & Electronics Engineering, Karpagam College of Engineering)
Irudayaraj, Gerald Christopher Raj (Dept. of Electrical & Electronics Engineering, PSNA College of Engineering & Technology)
Mylsamy, Kaliamoorthy (Dept. of Electrical & Electronics Engineering, Dr. Mahalingam College of Engineering & Technology)
Publication Information
Journal of Power Electronics / v.17, no.1, 2017 , pp. 115-126 More about this Journal
Abstract
This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.
Keywords
Harmonics; H-bridge; Multilevel inverter; PWM;
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Times Cited By KSCI : 3  (Citation Analysis)
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