• Title/Summary/Keyword: Multilevel Cascaded Inverter

Search Result 111, Processing Time 0.026 seconds

Design and Development of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks (PEBB 개념을 적용한 H-브릿지 멀티레벨 인버터의 설계 및 개발)

  • Park, Young-Min;Lee, Se-Hyun
    • Proceedings of the KIPE Conference
    • /
    • 2011.07a
    • /
    • pp.320-321
    • /
    • 2011
  • This paper proposes a practical design and development for CHBM inverter based on Power Electronics Building Blocks (PEBB). It is shown that the expansion and modularization characteristics of the CHBM inverter are improved since the individual inverter modules operate more independently, when using the PEBB concept. The proposed design and control methods are described in detail and the validity of the proposed system is verified experimentally in various industrial fields.

  • PDF

Developing Of Cascaded NPC Multilevel Inverter (Cascaded NPC 고압인버터 개발)

  • Park, Jong-Je;Yun, Hong-Min;Yoo, An-No;Jang, Dong-Je
    • Proceedings of the KIPE Conference
    • /
    • 2013.07a
    • /
    • pp.45-46
    • /
    • 2013
  • 멀티레벨 고압인버터 토폴로지 중 저압 Power Cell를 이용하여 고압을 출력하는 Cascaded 방식이 산업계에서는 널리 사용되고 이다. 최근 제품화된 Cascaded 방식은 크게 두 가지 형태로 구분할 수 있다. 저압 Power Cell에 단상 H-Bridge를 이용한 Cascaded H-Bridge 멀티레벨 인버터와 단상 NPC(Neutral Point Clamped) 토폴로지를 적용한 Cascaded NPC 멀티레벨 인버터이다. 이 중 Cascaded NPC 멀티레벨 인버터의 경우 적은 수의 셀을 사용하여 CHB와 동일한 출력 레벨을 생성할 수 있으며, NPC 방식의 고압 인버터 고유의 장점을 모두 구현할 수 있다. 반대로 CHB Type과 NPC type의 단점인 복잡한 구조의 Phase Shift Transformer와 DC_Link 중성점 전압이 변동하는 단점 또한 나타나게 된다. 본 논문에서는 Cascaded NPC 멀티레벨 인버터의 이러한 단점을 극복하기 위한 새로운 방식의 Phase Shift Transformer와 NPC Power Cell의 중성점 전압 변동을 줄일 수 있는 기법에 대해 설명하고 이 기법에 대한 타당성을 모의시험을 통해 검증하였다.

  • PDF

Chopper Controller Based DC Voltage Control Strategy for Cascaded Multilevel STATCOM

  • Xiong, Lian-Song;Zhuo, Fang
    • Journal of Electrical Engineering and Technology
    • /
    • v.9 no.2
    • /
    • pp.576-588
    • /
    • 2014
  • The superiority of CMI (Cascaded Multilevel Inverter) is unparalleled in high power and high voltage STATCOM (Static Synchronous Compensator). However, the parameters and operating conditions of each individual power unit composing the cascaded STATCOM differ from unit to unit, causing unit voltage disequilibrium on the DC side. This phenomenon seriously impairs the operation performance of STATCOM, and thus maintaining the DC voltage balance and stability becomes critical for cascaded STATCOM. This paper analyzes the case of voltage disequilibrium, combines the operation characteristics of the cascaded STATCOM, and proposes a new DC voltage control scheme with the advantages of good control performance and stability. This hierarchical control method uses software to achieve the total active power control and also uses chopper controllers to enable that the imbalance power can flow among the capacitors in order to keep DC capacitor voltages balance. The operating principle of the chopper controllers is analyzed and the implementation is presented. The major advantages of the proposed control strategy are that the number of PI regulators has been decreased remarkably and accordingly the blindness of system design and debugging also reduces obviously. The simulation reveals that the proposed control scheme can achieve the satisfactory control goals.

Identification of Open-Switch and Short-Switch Failure of Multilevel Inverters through DWT and ANN Approach using LabVIEW

  • Parimalasundar, E.;Vanitha, N. Suthanthira
    • Journal of Electrical Engineering and Technology
    • /
    • v.10 no.6
    • /
    • pp.2277-2287
    • /
    • 2015
  • In recent times, multilevel inverters are given high priority in many large industrial drive applications. However, the reliability of multilevel inverters are mainly affected by the failure of power electronic switches. In this paper, open-switch and short-switch failure of multilevel inverters and its identification using a high performance diagnostic system is discussed. Experimental and simulation studies were carried out on five level cascaded H-Bridge multilevel inverter and its output voltage waveforms were analyzed at different switch fault cases and at different modulation index values. Salient frequency domain features of the output voltage signal were extracted using the discrete wavelet transform multi resolution signal decomposition technique. Real time application of the proposed fault diagnostic system was implemented through the LabVIEW software. Artificial neural network was trained offline using the Matlab software and the resultant network parameters were transferred to LabVIEW real time system. In the proposed system, it is possible to precisely identify the individual faulty switch (may be due to open-switch (or) short-switch failure) of multilevel inverters.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

  • Kavitha, R;Rani, Thottungal
    • Journal of Power Electronics
    • /
    • v.18 no.4
    • /
    • pp.1037-1050
    • /
    • 2018
  • This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

Efficient switching pattern for cascaded H-bridge multilevel inverter (Cascaded H-bridge 멀티레벨인버터의 효율적인 스위칭 패턴)

  • Kim, Sun-Pil;Jung, Bo-Chang;Kang, Feel-Soon
    • Proceedings of the KIEE Conference
    • /
    • 2011.07a
    • /
    • pp.1167-1168
    • /
    • 2011
  • 두 대의 동일한 H-bridge 모듈로 구성되는 Cascaded H-bridge 멀티레벨인버터는 출력전압에 5-레벨을 형성할 수 있으며 출력전압의 THD를 개선시키기 위해 PWM 스위칭을 적용할 수 있다. 출력필터 사이즈를 줄이기 위해 PWM 스위칭 주파수를 높일 수 있지만 스위칭 손실이 증가하게 된다. 본 논문에서는 이러한 경우 스위칭 손실을 저감시킬 수 있는 변형된 스위칭 패턴을 제안한다. Cascaded H-bridge 멀티레벨인버터의 특성을 고려하여 하단 H-bridge 모듈의 스위치는 기본 출력전압 레벨을 형성하도록 동작시키며, 상단 H-bridge 모듈 스위칭에 의한 출력값이 기본 전압레벨에 가감되어 PWM 출력전압 형성하도록 동작시킨다. 제안된 스위칭 패턴을 Cascaded H-bridge 멀티레벨인버터에 적용하여 기존 스위칭 방법과 비교 분석한다.

  • PDF

Half and Full-Bridge Cell based Stand-Alone Photovoltaic Multi-Level Inverter (하프ㆍ풀-브리지 셀을 이용한 독립형 태양광 멀티레벨 인버터)

  • Kang Feel-Soon;Oh Seok-Kyu;Park Sung-Jun;Kim Jang-Mok;Kim Cheul-U
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.9 no.5
    • /
    • pp.438-447
    • /
    • 2004
  • A new multilevel PWM inverter using a half-bridge and full-bridge cells is proposed for the use of stand-alone photovoltaic inverters. The configuration of the proposed multilevel PWM inverter is based on a prior 11-level shaped PWM inverter. Among three full-bridge cells employed in the prior inverter, one cell is substituted by a half-bridge cell. Owing to this simple alteration, the proposed inverter has three promising merits. First it increases the number of output voltage levels resulted in high quality output voltages. Second, it reduces two power switching devices by means of employing a half-bridge cell. Third, it reduces power imposed on a transformer connected with the half-bridge unit. That is to say, most power is transferred to loads via cascaded transformers connected with low switching inverters, which are used to synthesize the fundamental output voltage levels whereas the output of a transformer linked to a high switching inverter is used to improve the final output voltage waves; thus, it is desirable in the point of the improvement of the system efficiency. By comparing to the prior 11-level PWM inverter, it assesses the performance of the proposed inverter as a stand-alone photovoltaic inverter. The validity of the proposed inverter is verified by computer-aided simulations and experimental results.

Control Strategies for Multilevel APFs Based on the Windowed-FFT and Resonant Controllers

  • Han, Yang
    • Journal of Power Electronics
    • /
    • v.12 no.3
    • /
    • pp.509-517
    • /
    • 2012
  • This paper presents control strategies for cascaded H-bridge multilevel active power filters (APFs). A current loop controller is implemented using a proportional-resonant (PR) regulator, which achieves zero steady-state error at target frequencies. The power balancing mechanism for the dc-link capacitor voltages is analyzed and a voltage balancing controller is presented. To mitigate the picket-fence effect of the conventional FFT algorithm under asynchronous sampling conditions, the Hanning Windowed-FFT algorithm is proposed for reference current generation (RCG). This calculates the frequency, amplitude and phase of individual harmonic components accurately and as a result, selective harmonic compensation (SHC) is achieved. Simulation and experimental results are presented, which verify the validity and effectiveness of the devised control algorithms.

Development of 22.9kV 5MVA STATCOM based Cascaded multilevel Converter (다단 멀티레벨 컨버터 방식의 22.9kV 5MVA STATCOM 개발)

  • Kim, Sang-Hyun;In, Dong-Seok;Park, Young-Min;Park, Kiwon;Kwon, Byung-Ki;Choi, Chang-Ho
    • Proceedings of the KIPE Conference
    • /
    • 2013.07a
    • /
    • pp.536-537
    • /
    • 2013
  • 전기로와 같은 고압, 대용량의 산업응용분야에서 전원 안정화를 목적으로 하는 변동부하에 의해 발생되는 정상분 및 역상분의 무효전력을 보상하기 위한 고성능의 STATCOM의 개발이 요구되었다. 본 논문에서는 POSCO ICT에서 개발한 22.9kV 5MVA STATCOM(static synchronous compensator)에 대해 기술하였다. 개발된 STATCOM은 다단 멀티레벨 컨버터(Cascaded Multilevel Converter) 방식으로 Delta 구성하였으며, 각상당 12개의 H-Bridge Inverter가 직렬로 구성되어 25 레벨의 전압을 출력한다.

  • PDF

Verification of New Family for Cascade Multilevel Inverters with Reduction of Components

  • Banaei, M.R.;Salary, E.
    • Journal of Electrical Engineering and Technology
    • /
    • v.6 no.2
    • /
    • pp.245-254
    • /
    • 2011
  • This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.