• 대한기계학회:학술대회논문집
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• 대한기계학회 2000년도 춘계학술대회논문집A
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• pp.760-765
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• 2000

The study deals with the development of a computational procedure for evaluating the temperature rise in dry and lubricated multi-layered contacts of head/disk interface. A transient computational model with a transformed rectangular computational domain is utilized. A model and a computational method for micro-contact with sub-lubricated zone, including friction heat generation, have been presented. The model was applied, taking full account of the changes in contact area and contact load due to frictional heating. The computational distribution of temperature is obtained with the analytical findings for various composition and contact conditions. Especially, a rapid rise ($220^{\circ}C$ or above) in read head temperature lese to a saturation in the influence of a thermal spike on signal performance. This general class of problems can be treated provided that heat generation distribution and layer properties are known.

• 센서학회지
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• 제15권1호
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• pp.7-12
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• 2006

The multi-functional one-chip sensor has been fabricated to reduce output variation under various water environment. There were a temperature sensor, a piezoresistive type pressure sensor, and a electrode type conductivity sensor in the fabricated one-chip sensor. This sensor was measured water depth in the range of $0{\sim}180cm$, temperature in the range of $0{\sim}50^{\circ}C$, and salinity in the range of 0 $0wt%{\sim}5wt%$, respectively. Since the change of water depth in solution environment depends on various factors such as salinity, latitude, temperature, and atmospheric pressure, the water depth sensor is needed to be compensated. We tried to compensate the salinity and temperature dependence for the pressure in water by using lookup-table method.

• 한국컴퓨터정보학회논문지
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• 제16권6호
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• pp.1-10
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• 2011

멀티코어 프로세서를 설계하는데 있어서 구성요소들을 연결하는 와이어 길이의 증가로 인한 지연 현상은 성능향상에 큰 걸림돌이 되고 있다. 멀티코어 프로세서의 와이어 지연 문제를 해결하기 위하여 최근에는 3차원 구조의 멀티코어 프로세서 설계 기술이 많은 주목을 받고 있다. 3차원 구조 멀티코어 프로세서 설계 기술은 코어들을 수직으로 적층함으로써, 물리적인 연결망 길이를 크게 감소시켜 성능향상과 함께 연결망에서 소비되는 전력을 줄일 수 있다. 하지만 많은 전력을 소모하는 회로를 수직으로 적층함으로써 전력밀도가 증가하여 프로세서 내부의 온도가 크게 상승하는 문제를 가지고 있다. 본 논문에서는 3차원 구조 멀티코어 프로세서에서의 발열문제를 해결 할 수 있는 플로어플랜 방법을 제안하기 위해 칩 내부에 적층되는 코어의 수직적 배치 형태를 다양하게 변화시키면서 그에 따른 온도 변화를 살펴보고자 한다. 실험 결과를 통해, 프로세서 내부의 온도 감소를 위해서는 코어와 L2 캐쉬를 수직으로 인접하게 적층함으로써 코어의 온도를 낮추는 기법이 매우 효과적임을 알 수 있다. 코어와 코어가 수직으로 상호 인접하는 플로어플랜과 비교하여, 코어와 L2 캐쉬를 수직으로 인접하게 배치시키는 기법이 4-레이어 구조의 경우에는 평균 22%, 2-레이어 구조의 경우 평균 13%의 온도 감소 효과를 보임을 알 수 있다.

• Journal of Magnetics
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• 제7권3호
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• pp.98-100
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• 2002

Tunnel magnetoresistive devices using an individual multi-walled carbon nanotube were fabricated and their low-temperature electrical transport propertiers were investigated. With the ferromagnetic Co electrodes, the multi-walled carbon nanotube exhibited hysteretic magnetoresistance curve at low temperatures. Depending on the temperature and the bias current, the magnetoresistance ratio can be as high as 16% at the temperature of 2.2 K. Such high magnetoresistance ratio indicates a long diffusion length of the multi-walled carbon nanotube.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2009년도 춘계학술대회 논문집
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• pp.410-411
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• 2009

The multi-component ceramic proton conductor, $BaZr(Y)O_3-SiO_2-TiO_2-ZrO_2$ (BZY-STZ) and $LaPO_4-SiO_2-TiO_2-ZrO_2$ (LP-STZ), were synthesized by micro-emersion and sol-gel technique. The characterization of proton conductors were carried out using X-ray diffraction(XRD), thermogravimetric analysis(TGA), differential thermal analysis(DTA), impedance analysis. The proton conductors indicate the possibility of application for the intermediate temperature up to $700^{\circ}C$.

• 한국해양공학회지
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• 제9권1호
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• pp.142-151
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• 1995

A simulation program concerned with multi-surface fatigue cracks which initiated at the semi-circular surface notches has been developed to predict their growth and coalescence behaviors at the elevated temperature. Three kinds of coalescence models such as SPC(surface point connection), ASME and BSI(British Standards Institution) conditions were applied, and the results of the simulation were compared with those of the experiment. This simulation is able to enhance the reliance and integrity of structures especially under the elevated temperature which have lots of difficulties in experiments and applications. This shows that the simulation result has utility for fatigue life prediction. Even though all the specimens were the same shape, the error rate was increased in accordance with the applied stress to the specimen. Among the material constants C and m in the narrow band, the results applied upper values of the band to the simulation has shown quite small error compared with the experiment results.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.104.2-104
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• 2001

In the intelligent integrated systems, the delay time must be reduced using highly parallel processors, as well as high throughput performance. In this paper, we propose a new concept for building 3D highly parallel processors using multi-layer printed wiring boards with built-in soldering heater (BISH-PWB). The proposed BISH is realized with the long and narrow cupper wiring pattern on the internal layer in the terminal pattern area. Based on the linearity of the cupper resistance vs. temperature, we can measure the BISH, temperature and its calorific value from the heater voltage and current measurements. If we provide the BISH temperature control systems for each BISH, selective multi-point soldering can be realized with same ...

• Coupled systems mechanics
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• 제9권5호
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• pp.411-432
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• 2020

This research is devoted to the study of plane wave propagation in homogeneous transversely isotropic (HTI) magneto-thermoelastic rotating medium with combined effect of Hall current and two temperature due to multi-dual-phase lag heat transfer. It is analysed that, for 2-D assumed model, three types of coupled longitudinal waves (quasi-longitudinal, quasi-transverse and quasi-thermal) are present. The wave characteristics like phase velocity, specific loss, attenuation coefficients, energy ratios, penetration depths and amplitude ratios of transmitted and reflected waves are computed numerically and illustrated graphically and compared for different theories of thermoelasticity. Some particular cases are also derived from this research.

• 한국세라믹학회지
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• 제42권12호
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• pp.865-871
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• 2005

Submicron thick solid electrolyte membrane is essential to the implementation of low temperature solid oxide fuel cell, and, therefore, development of new electrode structures is necessary for the submicron thick solid electrolyte deposition while providing functions as current collector and fuel transport channel. In this research, a nickel membrane with multi-stage nano hole array has been produced via modified two step replication process. The obtained membrane has practical size of 12mm diameter and $50{\mu}m$ thickness. The multi-stage nature provides 20nm pores on one side and 200nm on the other side. The 20nm side provides catalyst layer and $30\~40\%$ planar porosity was measured. The successful deposition of submicron thick yttria stabilized zirconia membrane on the substrate shows the possibility of achieving a low temperature solid oxide fuel cell.

• 마이크로전자및패키징학회지
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• 제9권3호
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• pp.1-6
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• 2002

A low temperature process technology of copper thin films has been developed by a chemical vapor deposition technology for multi-level metallzations in ULSI fabrication. The copper films were deposited on TiN/Si substrates in helium atmosphere with the substrate temperature between $130^{\circ}C$ and $250^{\circ}C$. In order to get more reliable metallizations, effects on the post-annealing treatment to the electrical properties of the copper films have been investigated. The Cu films were annealed at the $5 \times10^{-6}$ Torr vacuum condition and the electrical resistivity and the nano-structures were measured for the Cu films. The electrical resistivity of Cu films shown to be reduced by the post-annealing. The electrical resistivity of 2.0 $\mu \Omega \cdot \textrm{cm}$ was obtained for the sample deposited at the substrate temperature of $180^{\circ}C$ after vacuum annealed at $300^{\circ}C$. The resistivity variations of the films was not exactly matched with the size of the nano-structures of the copper grains, but more depended on the contamination of the copper films.