• Journal of Mechanical Science and Technology
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• v.19 no.5
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• pp.1065-1071
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• 2005

In this study, residual stress distribution in multi-stacked film by MEMS (Micro-Electro Mechanical System) process is predicted using Finite Element method (FEM). We evelop a finite element program for residual stress analysis (RESA) in multi-stacked film. The RESA predicts the distribution of residual stress field in multi-stacked film. Curvatures of multi­stacked film and single layers which consist of the multi-stacked film are used as the input to the RESA. To measure those curvatures is easier than to measure a distribution of residual stress. To verify the RESA, mean stresses and stress gradients of single and multi layers are measured. The mean stresses are calculated from curvatures of deposited wafer by using Stoney's equation. The stress gradients are calculated from the vertical deflection at the end of cantilever beam. To measure the mean stress of each layer in multi-stacked film, we measure the curvature of wafer with the left film after etching layer by layer in multi-stacked film.

• Macromolecular Research
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• v.14 no.1
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• pp.38-44
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• 2006

Vacuum deposited copper phthalocyanine (CuPc) was placed as a thin interlayer between indium tin oxide (ITO) electrode and a hole transporting layer (HTL) in a multi-layered, organic, light-emitting diode (OLEOs). The well-stacked CuPc layer increased the stability and efficiency of the devices. Thermal annealing after CuPc deposition and magnetic field treatment during CuPc deposition were performed to obtain a stacked-CuPc layer; the former increased the stacking density of the CuPc molecules and the alignment of the CuPc film. Thermal annealing at about 100$^{circ}C$ increased the current flow through the CuPc layer by over 25$\%$. Surface roughness decreased from 4.12 to 3.65 nm and spikes were lowered at the film surface as well. However, magnetic field treatment during deposition was less effective than thermal treatment. Eventually, a higher luminescence at a given voltage was obtained when a thermally-annealed CuPc layer was placed in the present, multi-layered, ITO/CuPc/NPD/Alq3/LiF/AI devices. Thermal annealing at about 100$^{circ}C$ for 3 h produced the most efficient, multi-layered EL devices in the present study.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.1
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• pp.7-11
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• 2015

In this study, $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film were prepared on glass substrate by DC/RF magnetron sputtering method. To prevent interfacial reaction between Ag and ITO layer, Ti buffer layer was inserted. Optical properties and sheet resistance were studied depending on laminating times of each multi-layered film especially in visible ray. The simulation program, EMP (essential macleod program), was adopted and compared with experimental data to expect the experimental result. It was found out that the transmittance of the first stacked $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film was more than 90%. However, with increasing stacking times, the optical properties of $Si_3N_4$/SnZnO/AZO/Ag/Ti/ITO multi-layer film get worse. Consequently, Ti layer is good for oxidation barrier, but too many uses of this layer may have an adverse effect to optical properties of TCO film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.381-382
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• 2007

IZO/Ag/IZO (IAI) anode films for flexible organic light emitting diodes (OLEDs) were grown on PC (polycarbonate) substrate using DC sputter (IZO) and thermal evaporator (Ag) systems as a function of Ag thickness. To investigate electrical and optical properties of IAI stacked films, 4-point probe and UV/Vis spectrometer were used, respectively. From a IAI stacked film with 12nm-thick Ag, sheet resistance of $6.9\;{\Omega}/{\square}$ and transmittance of above 82 % at a range of 500-550 nm wavelength were obtained. In addition, structural and surface properties of IAI stacked films were analyzed by XRD (X-ray diffraction) and SEM (scanning electron microscopy), respectively. Moreover, IAI stacked films showed dramatically improved mechanical properties when subjected to bending both as a function of number of cycles to a fixed radius. Finally, OLEDs fabricated on both flexible IAI stacked anode and conventional ITO/Glass were fabricated and, J-V-L characteristics of those OLEDs were compared by Keithley 2400.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.1
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• pp.33-40
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• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.

• Current Photovoltaic Research
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• v.8 no.3
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• pp.94-101
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• 2020

This study was trying to focus on achieving high efficiency of multi junction solar cell with thin film silicon solar cells. The proposed thin film Si-Ge/c-Si tandem junction solar cell concept with a combination of low-cost thin-film silicon solar cell technology and high-efficiency c-Si cells in a monolithically stacked configuration. The tandem junction solar cells using amorphous silicon germanium (a-SiGe:H) as an absorption layer of upper sub-cell were simulated through ASA (Advanced Semiconductor Analysis) simulator for acquiring the optimum structure. Graded Ge composition - effect of E_g profiling and inserted buffer layer between absorption layer and doped layer showed the improved current density (J_sc) and conversion efficiency (η). 13.11% conversion efficiency of the tandem junction solar cell was observed, which is a result of showing the possibility of thin film Si-Ge/c-Si tandem junction solar cell.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.204.1-204.1
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• 2015

We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

• Transactions of the Korean Society of Mechanical Engineers A
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• v.29 no.4 s.235
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• pp.526-533
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• 2005

Reliability problem in inkjet printhead, one of MEMS devices, is also very important. To eject an ink drop, the temperature of heater must be high so that ink contacting with surface reaches above $280^{o}C$ on the instant. Its heater is embedded in the thin multi-layer in which several materials are deposited. MEMS processes are the main sources of residual stresses development. Residual stress is one of the factors reducing the reliability of MEMS devices. We measured residual stresses of single layers that consist of multilayer. FE analysis is performed using design of experiment(DOE). Transient analysis for heat transfer is performed to get a temperature distribution. And then static analysis is performed with the temperature distribution obtained by heat transfer analysis and the measured residual stresses to get a stress distribution in the structure. Although the residual stress is bigger than thermal stress, thermal stress is more influential on fatigue life.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.189.1-189.1
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• 2013

Titanium dioxide (TiO2) is a wide bandgap semiconductor possessing photochemical stability and thus widely used for photocatalysis. However, enhancing photocatalytic efficiency is still a challenging issue. In general, the efficiency is affected by physio-chemical properties such as crystalline phase, crystallinity, exposed crystal facets, crystallite size, porosity, and surface/bulk defects. Here we propose an alternative approach to enhance the efficiency by studying interfaces between thin TiO2 layers to be stacked; that is, the interfacial phenomena influencing on the formation of porous structures, controlling crystallite sizes and crystallinity. To do so, multi-layered TiO2 thin films were fabricated by using a sol-gel method. Specifically, a single TiO2 thin layer with a thickness range of 20~40 nm was deposited on a silicon wafer and annealed at $600^{\circ}C$. The processing step was repeated up to 6 times. The resulting structures were characterized by conventional electron microscopes, and followed by carrying out photocatalytic performances. The multi-layered TiO2 thin films with enhancing photocatalytic efficiency can be readily applied for bio- and gas sensing devices.

• Progress in Superconductivity and Cryogenics
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• v.14 no.1
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• pp.4-7
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• 2012

Coated conductors have been developed to increase piece length and critical current for electric power applications. Otherwise, Many efforts were carried out to reduce AC loss of coated conductor for AC applications. Twisting and cabling processes are effective to reduce AC loss but, these processes can not be applied for tape shaped coated conductor. It is inevitable to have thin rectangular shape because coated conductor is fabricated by thin film deposition process on metal substrate. In this study, round shape superconducting wire was first fabricated using coated conductors. First of all, Ag coated conductor was used. coated conductor was slitted to several wires with narrow width below 1mm. 12ea slitted wires were parallel stacked on top of another until making up the square cross-section. The bundle of coated conductors was heat treated to stick on each other by diffusion bonding and then copper plated to make round shape wire. Critical current of round wire was measured 185A at 77K, self field.