• Structural Engineering and Mechanics
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• 제30권5호
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• pp.619-645
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• 2008

This study presents the efficiency of simulating structural systems using a method that combines a simplified component model (SCM) and rigorous component model (RCM). To achieve a realistic simulation of structural systems, a numerical model must be adequately capturing the detailed behaviors of real systems at various scales. However, capturing all details represented within an entire structural system by very fine meshes is practically impossible due to technological limitations on computational engineering. Therefore, this research develops an approach to simulate large-scale structural systems that combines a simplified global model with multiple detailed component models adjusted to various scales. Each correlated multi-scale simulation model is linked to others using a multi-level hierarchical modeling simulation method. Simulations are performed using nonlinear finite element analysis. The proposed method is applied in an analysis of a simple reinforced concrete structure and the Reuipu Elementary School (an existing structure), with analysis results then compared to actual onsite observations. The proposed method obtained results very close to onsite observations, indicating the efficiency of the proposed model in simulating structural system behavior.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1987년도 한국자동제어학술회의논문집; 한국과학기술대학, 충남; 16-17 Oct. 1987
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• pp.488-491
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• 1987

In this paper. a heuristic multi-thresholding algorithm is proposed to extract objects from background. Specifically the proposed algorithm finds out multi valleys from gray level histogram automatically and non-recursively. Some experimental result for various types of image. are presented, to show the effectiveness of the proposed algorithm.

• Journal of Power Electronics
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• 제13권4호
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• pp.569-583
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• 2013

In this study, the simultaneous use of a multi-level converter (MLC) as a DC-motor drive and as an active battery cell balancer is investigated. MLCs allow each battery cell in a battery pack to be independently switched on and off, thereby enabling the potential non-uniform use of battery cells. By exploiting this property and the brake regeneration phases in the drive cycle, MLCs can balance both the state of charge (SoC) and temperature differences between cells, which are two known causes of battery wear, even without reciprocating the coolant flow inside the pack. The optimal control policy (OP) that considers both battery pack temperature and SoC dynamics is studied in detail based on the assumption that information on the state of each cell, the schedule of reciprocating air flow and the future driving profile are perfectly known. Results show that OP provides significant reductions in temperature and in SoC deviations compared with the uniform use of all cells even with uni-directional coolant flow. Thus, reciprocating coolant flow is a redundant function for a MLC-based cell balancer. A specific contribution of this paper is the derivation of a state-space electro-thermal model of a battery submodule for both uni-directional and reciprocating coolant flows under the switching action of MLC, resulting in OP being derived by the solution of a convex optimization problem.

• 한국지능시스템학회논문지
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• 제19권5호
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• pp.615-621
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• 2009

TFT-LCD 영상은 불균일한 휘도 분포와 노이즈 신호, 그리고 결함 신호로 구성되어 있다. 결함 신호는 주변 정상 영역의 화소값 분포에 비해 일정한 변화를 가지는 영역으로서 육안 검출이 어려운 수준의 한도성 결함을 포함한다. 본 논문에서는 다단계 임계화를 통해 신뢰할 수 있는 수준까지 결함과 결함 유사 영역을 모두 검출하는 과검출(過檢出)을 수행하고, Parzen Window를 이용한 확률 밀도 함수를 통해 실제 결함이 아닌 유사 영역을 제거하는 알고리즘을 제안하였다. 제안한 알고리즘의 유효성을 확인하기 위해 다양한 실험 영상에 대한 실험 결과를 살펴보고 실제 TFT-LCD 영상에 적용하여 봄으로써 신뢰성 있는 결함 검출에 적합함을 입증하였다.

• 한국통신학회논문지
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• 제21권5호
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• pp.1240-1255
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• 1996

This paper suggests power optimization technique in multi-level SCPC system as a method for efficient utilization of limited satellite power. The power optimization is realized by optimal assignment of satellite input carrier powers considering interference and noise generated in up-link and down-link. The Fletcher-Powell algorithm searching minimum(or maximum) point using gradient information is used to detemine the optimal input carrier powers. To apply Flectcher-Powell algorithm mathematical descriptions and their partial derivatives to interference and nose are presented. Because a target, which should be optimized, is satellite input carrier power, amplitude of each carrier group will be assumed to be an independent variable. The performance criterion for optimal power assignmentis classified into 4 categories with respect to CNR of destination receiver earth station to meet the requirement for various satellite link environment. Simulation results for two-level, four-level and six-level SCPC system are presented.

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권1호
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• pp.55-60
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• 2010

For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.

• Journal of Information Technology Applications and Management
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• 제19권1호
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• pp.37-46
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• 2012

The scheduling problem of large products like ships, airplanes, space shuttles, assembled constructions, and automobiles is very complex in nature. To reduce inherent computational complexity, we often design scheduling systems that the original problem is decomposed into small sub-problems, which are scheduled independently and integrated into the original one. Moreover, the steep growth of communication technology and logistics makes it possible to produce a lot of multi-nation corporation by which products are produced across more than one plant. Therefore vertical and lateral coordination among decomposed scheduling systems is necessary. In this research, we suggest an agent-based coordinating mechanism for multi-level scheduling systems in supply chain. For design of a general coordination mechanism, at first, we propose a grammar to define individual scheduling agents which are responsible to their own plants, and a meta-level coordination agent which is engaged to supervise individual scheduling agents. Second, we suggest scheduling agent communication protocols for each scheduling agent topology which is classified according to the system architecture, existence of coordinator, and direction of coordination. We also suggest a scheduling agent communication language which consists of three layers : Agent Communication Layer, Scheduling Coordination Layer, Industry-specific Layer. Finally, in order to improve the efficiency of communication among scheduling agents we suggest a rough capacity coordination model which supports to monitor participating agents and analyze the status of them. With this coordination mechanism, we can easily model coordination processes of multiple scheduling systems. In the future, we will apply this mechanism to shipbuilding domain and develop a prototype system which consists of a dock-scheduling agent, four assembly-plant-scheduling agents, and a meta-level coordination agent. A series of experiment using the real-world data will be performed to examine this mechanism.

• ETRI Journal
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• 제43권3호
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• pp.524-537
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• 2021

High-performance Linpack (HPL) is among the most popular benchmarks for evaluating the capabilities of computing systems and has been used as a standard to compare the performance of computing systems since the early 1980s. In the initial system-design stage, it is critical to estimate the capabilities of a system quickly and accurately. However, the original HPL mathematical model based on a single core and single communication layer yields varying accuracy for modern processors and accelerators comprising large numbers of cores. To reduce the performance-estimation gap between the HPL model and an actual system, we propose a mathematical model for multi-communication layered HPL. The effectiveness of the proposed model is evaluated by applying it to a GPU cluster and well-known systems. The results reveal performance differences of 1.1% on a single GPU. The GPU cluster and well-known large system show 5.5% and 4.1% differences on average, respectively. Compared to the original HPL model, the proposed multi-communication layered HPL model provides performance estimates within a few seconds and a smaller error range from the processor/accelerator level to the large system level.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제11B권3호
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• Journal of international Conference on Electrical Machines and Systems
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• 제2권2호
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• pp.179-183
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• 2013

This paper report on experimental results of 5-level inverter by DC divided link voltage. We have alreday reported that DC divided link valtage comes to be able to reduse harmonic of out line voltage. So we tested whether DC divided link voltage can reduce harmonics in experimental setup. This paper shows simulation results and experimental results. And we confirmed that DC divided link voltage can also apply in experimental setup.