• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.3
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• pp.116-121
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• 2006

Most high-k materials are well known not to be etched easily, Some problems such as low etch rate poor sidewall angle, plasma damage, and process complexity were emerged from the high-density DRAM fabrication. Chemical mechanical polishing (CMP) by a damascene process was proposed to pattern this high-k material was polished with some commercial silica slurry as a function of pH variation. Sufficient removal rate with adequate selectivity to realize the pattern mask of tera-ethyl ortho-silicate (TEOS) film for the vertical sidewall angle were obtained. The changes of X-ray diffraction pattern and dielectric constant by CMP process were negligible. The planarization was also achieved for the subsequent multi-level processes. Our new CMP approach will provide a guideline for effective patterning of high-k material by CMP technique.

• Applied Science and Convergence Technology
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• v.24 no.2
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• pp.33-40
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• 2015

$ZrO_2$ and Al-Zr composite oxide film was prepared by vacuum assisted sol-gel dip coating method and anodizing. $ZrO_2$ films annealed above $400^{\circ}C$ have tetragonal structure. $ZrO_2$ layers inside etch pits were successfully coated from the $ZrO_2$ sol. The double layer structures of samples were obtained after being anodized at 100 V to 600 V. From the TEM images, it was found that the outer layer was $Al_2O_3$, the inner layer was multi-layer of $ZrO_2$, Al-Zr composite oxide and Al hydrate. The capacitance of $ZrO_2$ coated foil exhibited about 28.3% higher than that of non-coating foil after being anodized at 100 V. The high capacitance of $ZrO_2$ coated foils anodized at 100 V can be attributed to the relatively high percentage of inner layer in total thickness. The electrical properties, such as withstanding voltage and leakage current of coated and non-coated Al foils showed similar values. From the results, $ZrO_2$ and Al-Zr composite oxide is promising to be used as the partial dielectric of high voltage capacitor to increase the capacitance.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.8
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• pp.476-482
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• 2016

Convectional PZT based piezoelectric ceramics have to sinter at high temperature about $1,200^{\circ}C$ for their suitable electrical properties. However, some issues: low temperature sintering piezoelectric ceramic composition and reliable internal electrode, have recently attracted a great deal of interest as a highly efficient multi-layered piezoelectric ceramics. In order to optimize low temperature sintering conditions of thick-film PMN-PZ-PT ceramic, it was investigated sintering and piezoelectric properties according to the change of $LiBiO_2$ contents. Thus, the superior piezoelectric properties were found at the pallet type PMN-PZ-PT optimized with low sintering processing at $925^{\circ}C$ including 7 wt% $LiBiO_2$ sintering aid. Consequentially, we successfully manufactured thick-film PMN-PZ-PT ceramics, which had superior piezoelectric and dielectric properties, with 5 wt% of $LiBiO_2$ sintering aid at temperature of $900^{\circ}C$.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.382-384
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• 2009

In this study, high stable oxide thin-film transistors (TFTs) have been developed by using several approaching techniques, which including a change of the channel composition ratio in multi-component oxide semiconductors, a change of TFT structure with interfacial dielectric layers, a control of interface roughness, a channel-doping method, and so on.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.226-229
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• 2003

Following the successful development of practical high temperature superconducting (HTS) wires, there has been renewed activity in the development of superconducting power equipments. HTS equipments must be operated in the coolant, such as liquid nitrogen (L$N_2$) or cooled by cooler, such as GM-cryocooler to maintain the temperature below critical temperature. In this paper, dielectric strength of some insulating materials, such as epoxy, teflon, and glass fiber reinforced plastic (GFRP) in L$N_2$was measured. Surface breakdown voltage of GFRP which is basic property in design of HTS solenoid coil was measured. Epoxy is a goof insulating material but it is fragile at cryogenic temperature. The multi-layer insulating method of current lead is suggested to compensate this fragile property. It consists of teflon tape layer and epoxy layer fixed with texture. Based on these measurements, the 6.6㎸ class HTS magnet for DC reactor type high-T$_{c}$ superconducting fault current limiter (SFCL) was successfully fabricated and tested.d.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.99-102
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• 2000

Via for achieving reliable fabrication of MCM-D substrate was formed on the photosensitive BCB layer. MCM-D substrate consists of photosensitive BCB(Benzocyclobutene) interlayer dielectric and copper conductors. In order to form the vias in photosensitive BCB layer, the process of BCB and plasme etch using $C_2$F$_{6}$ gas were evaluated. The thickness of BCB after soft bake was shrunk down to 60% of the original. AES analysis was done on two vias, one is etched in $C_2$F$_{6}$ gas and the other is non etched. On via etched in $C_2$F$_{6}$, native C was detected and the amount of native C was reduced after Ar sputter. On via non etched in $C_2$F$_{6}$, organic C was detected and amount of organic C was reduced a little after Ar sputter. As a result of AES, BCB residue was not removed by Ar sputter, so plasma etch is necessary for achieving reliable via.ble via.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.12
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• pp.601-605
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multi-layer interconnections in smaller scales with higher integration density. Low-k materials are applied to the inter-metal dielectric (IMD) materials in order to overcome the RC delay. Relaxation continuum (RCT) model that includes neutral-species transport model have developed to model the etching process in a capacitively coupled plasma (CCP) device. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. For the etching of low-k materials by $N_2/H_2$ plasma, N and H atoms have a big influence on the materials. Moreover the distributions of excited neutral species influence the plasma density and profile. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatio-temporal steady state profile could be obtained.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.1
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• pp.80-86
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• 2002

This paper describes to extend the MLFMA(Multi-Level Fast Multipole Algorithm) for three-dimensional capacitance computation in the case of conductors embedded in an arbitrary dielectric medium. The triangular meshes are used and refined in the area which has heavy charge density. This technique is applied to the capacitance extraction of three-dimensional structures with multiple dielectrics. The results show good convergence with the comparable accuracy, and this adaptive technique coupled with MLFMA is useful to reduce computing time and the number of elements with least additional computational efforts in large three dimensional problems.

• Journal of the Korean Ceramic Society
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• v.37 no.4
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• pp.295-301
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• 2000

The effect of V2O5 addition on the low temperature sintering of Pb(Mn1/3Sb2/3)O3-PZT ceramics, which is known as a prominent material for piezoelectric transformer application was studied, and the densification behavior and piezoelectric characteristics of the samples as a function of heating rate were also examined. V2O5 led the system to liquid phase sintering by forming liquid phase during sintering, which accelerated densification through the particle rearrangement in the early stage of sintering. The liquid phase mostly existed at grain boundaries retarded the evaporation of PbO, while the densification temperature and the weight loss of V2O5-free samples were higher than those of samples with V2O5. Faster heating improved the densification of the samples regardless of V2O5 addition. The low temperature sintering at 100$0^{\circ}C$ was achieved in PMS-PZT ceramics with high density and reasonable dielectric and piezoelectric characteristics. This result revealed optimistic way to the development of multi-layered piezoelectric transformers.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.10
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• pp.803-806
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• 2011

1 mol% $Li_2O$ excess $0.9(Na_{0.52}K_{0.48})NbO_3-0.1LiTaO_3$ lead-free piezoelectric multilayer ceramic actuators were investigated to determine their aging properties. To reduce the thermal aging behavior, we applied a rectified unipolar electric field of 5 kV/mm to the specimen to accelerate the electric aging behavior. By employing a rectified unipolar electric field for the piezoelectric actuators, we could remove undesirable heating from the relaxation current in the motion of the ferroelectric domain. To accelerate the aging test, the applied electric fields had a frequency of 900 Hz. To have enough time for charging and discharging, we employed an accurate time constant to design the equivalent circuit model for the aging tester. To extract exact aging behavior, we measured the pseudo-piezoelectric coefficient before and after the aging process. We also measured the electro-mechanical coupling coefficient, the frequency-dependent dielectric permittivity, and the impedance to compare with fresh and aged specimen.