• Journal of KIISE:Software and Applications
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• v.29 no.11
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• pp.809-817
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• 2002

This paper describes a new face detection method that is a pre-processing algorithm for on-line face recognition. To complement the weakness of using only edge or rotor features from previous face detection method, we propose the two types of face detection method. The one is a combined method with edge and color features and the other is a center area color sampling method. To prevent connecting the people's face area and the background area, which have same colors, we propose a new adaptive edge detection algorithm firstly. The adaptive edge detection algorithm is robust to illumination variance so that it extracts lots of edges and breakouts edges steadily in border between background and face areas. Because of strong edge detection, face area appears one or multi regions. We can merge these isolated regions using color information and get the final face area as a MBR (Minimum Bounding Rectangle) form. If the size of final face area is under or upper threshold, color sampling method in center area from input image is used to detect new face area. To evaluate the proposed method, we have experimented with 2,100 face images. A high face detection rate of 96.3% has been obtained.

• Journal of Satellite, Information and Communications
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• v.2 no.2
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• pp.64-68
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• 2007

This paper describes the development of RF front.end equipment of a wide band high precision satellite navigation receiver to be able to receive the currently available GPS navigation signal and the GALILEO navigation signal to be developed in Europe in the near future. The wide band satellite navigation receiver with high precision performance is composed of L - band antenna, RF/IF converters for multi - band navigation signals, and high performance baseband processor. The L - band satellite navigation antenna is able to be received the signals in the range from 1.1 GHz to 1.6 GHz and from the navigation satellite positioned near the horizon. The navigation signal of GALILEO navigation satellite consists of L1, E5, and E6 band with signal bandwidth more than 20 MHz which is wider than GPS signal. Due to the wide band navigation signal, the IF frequency and signal processing speed should be increased. The RF/IF converter has been designed with the single stage downconversion structure, and the IF frequency of 140 MHz has been derived from considering the maximum signal bandwidth and the sampling frequency of 112 MHz to be used in ADC circuit. The final output of RF/IF converter is a digital IF signal which is generated from signal processing of the AD converter from the IF signal. The developed RF front - end has the C/N0 performance over 40dB - Hz for the - 130dBm input signal power and includes the automatic gain control circuits to provide the dynamic range over 40dB.

• Journal of Korea Water Resources Association
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• v.50 no.6
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• pp.429-440
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• 2017

A series of multispectral high-resolution Korean Multi-Purpose Satellite (KOMPSAT) images were analyzed to detect the geographical changes in four different tidal flats in the west coast of South Korea. The method of unsupervised classification was used to generate a series of land use/land cover (LULC) maps from the satellite images, which were used as the input of the temporal trajectory analysis to detect the temporal change of coastal wetlands and its association with natural and anthropogenic activities. The accurately classified LULC maps extracted from the KOMPSAT images indicate that these multispectral high-resolution satellite data is highly applicable to generate good quality thematic maps for extracting wetlands. The result of the trajectory analysis showed that, while the tidal flat area of Gyeonggi and Jeollabuk provinces was estimated to have changed due to tidal effects, the reductive trajectory of the wetland areas belonging to the Saemangeum province was caused by a high degree of human-induced activities including large reclamation and urbanization. The conservation of the Jeungdo Wetland Protected Area in Jeollanam province revealed that the social and environmental policies can effectively protect coastal wetlands from degradation. Therefore, monitoring for wetland change using high resolution KOMPSAT is expected to be useful to coastal environment management and policy making.

• Journal of the Korea Computer Graphics Society
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• v.15 no.3
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• pp.1-9
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• 2009

Traditional computer simulation uses only traditional input and output devices. With the recent emergence of haptic techniques, which can give users kinetic and tactile feedback, the field of computer simulation is diversifying. In particular, as the virtual-reality-based surgical simulation has been recognized as an effective training tool in medical education, the practical virtual simulation of surgery becomes a stimulating new research area. The surgical simulation framework should represent the realistic properties of human organ for the high immersion of a user interaction with a virtual object. The framework should make proper both haptic and visual feedback for high immersed virtual environment. However, one model may not be suitable to simulate both haptic and visual feedback because the perceptive channels of two feedbacks are different from each other and the system requirements are also different. Therefore, we separated two models to simulate haptic and visual feedback independently but at the same time. We propose an adaptive mass-spring method as a multi-modal simulation technique to synchronize those two separated models and present a framework for a dual model of simulation that can realistically simulate the behavior of the soft, pliable human body, along with haptic feedback from the user's interaction.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.1
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• pp.59-69
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• 2018

In this paper, we present a robust beamforming design to tackle the weighted sum-rate maximization (WSRM) problem in a multicell multiple-input multiple-output (MIMO) - non-orthogonal multipleaccess (NOMA) downlink system for 5G wireless communications. This work consider the imperfectchannel state information (CSI) at the base station (BS) by adding uncertainties to channel estimation matrices as the worst-case model i.e., singular value uncertainty model (SVUM). With this observation, the WSRM problem is formulated subject to the transmit power constraints at the BS. The objective problem is known as on-deterministic polynomial (NP) problem which is difficult to solve. We propose an robust beam forming design which establishes on majorization minimization (MM) technique to find the optimal transmit beam forming matrix, as well as efficiently solve the objective problem. In addition, we also propose a joint user clustering and power allocation (JUCPA) algorithm in which the best user pair is selected as a cluster to attain a higher sum-rate. Extensive numerical results are provided to show that the proposed robust beamforming design together with the proposed JUCPA algorithm significantly increases the performance in term of sum-rate as compared with the existing NOMA schemes and the conventional orthogonal multiple access (OMA) scheme.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.12
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• pp.3235-3245
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• 1996

A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.49 no.3
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• pp.38-46
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• 2012

Atrial fibrillation is needed to be detected at paroxysmal stage and to be treated. But, paroxysmal atrial fibrillation ECG is hardly obtained with 12-lead electrocardiographs but Holter systems. Presently, the averaged beat subtraction(ABS) method is solely used to estimate atrial fibrillatory waves even with somewhat large residual error. As an alternative, in this study, we suggested an ESAF(event-synchronous adaptive filter) based algorithm, in which the AF ECG was treated as a primary input and event-synchronous impulse train(ESIT) as a reference. And, ESIT was generated so to be synchronized with the ventricular activity by detecting QRS complex. We tested proposed algorithm with simulated AF ECGs and real AF ECGs. As results, even with low computational cost, this ESAF based algorithm showed better performance than the ABS method and comparable performance to algorithm based on PCA(principal component analysis) or SVD(singular value decomposition). We also proposed an expanded version of ESAF for some AF ECGs with multi-morphologic ventricular activities and this also showed reasonable performance. Ultimately, with Holter systems including our proposed algorithm, atrial activity signal can be precisely estimated in real-time so that it will be possible to calculate atrial fibrillatory rate and to evaluate the effect of anti-arrhythmic drugs.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.39-50
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• 2011

In this paper, we presents a CDR circuit for $2^{nd}$-generation AiPi+, one of the Intra-panel Interface. The speed of the proposed clock and data recovery is increased to 1.25 Gbps compared with that of AiPi+. The DLL-based CDR architecture is used to generate the multi-phase clocks. We propose the simple scheme for frequency detector (FD) to mitigate the harmonic-locking and reduce the complexity. In addition, the duty cycle corrector that limits the maximum pulse width is used to avoid the problem of missing clock edges due to the mismatch between rising and falling time of VCDL's delay cells. The proposed CDR is implemented in 0.18 um technology with the supply voltage of 1.8 V. The active die area is $660\;{\mu}m\;{\times}\;250\;{\mu}m$, and supply voltage is 1.8 V. Peak-to-Peak jitter is less than 15 ps and the power consumption of the CDR except input buffer, equalizer, and de-serializer is 5.94 mW.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.4
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• pp.16-24
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• 2002

This work describes a 10b 120 MSample/s CMOS pipelined A/D converter(ADC) based on a merged-capacitor switching(MCS) technique for high signal processing speed and high resolution. The proposed ADC adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area, and employs a MCS technique which improves sampling rate and resolution reducing the number of unit capacitor used in the multiplying digital-to-analog converter (MDAC). The proposed ADC is designed and implemented in a 0.25 um double-poly five-metal n-well CMOS technology. The measured differential and integral nonlinearities are within ${\pm}$0.40 LSB and ${\pm}$0.48 LSB, respectively. The prototype silicon exhibits the signal-to-noise-and-distortion ratio(SNDR) of 58 dB and 53 dB at 100 MSample/s and 120 MSample/s, respectively. The ADC maintains SNDR over 54 dB and the spurious-free dynamic range(SFDR) over 68 dB for input frequencies up to the Nyquist frequency at 100 MSample/s. The active chip area is 3.6 $mm^2$(＝ 1.8 mm ${\times}$ 2.0 mm) and the chip consumes 208 mW at 120 MSample/s.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1050-1058
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• 2005

This paper presents how to design and implement a very compact, cost effective and broad band receiver module for IEEE 802.16 FWA(Fixed Wireless Access) in the 40 GHz band. The presented receiver module is fabricated in a multi-layer LTCC(Low Temperature Cofired Ceramic) technology with cavity process to achieve excellent electrical performances. The receiver consists of two MMICs, low noise amplifier and sub-harmonic mixer, an embedded image rejection filter and an IF amplifier. CB-CPW, stripline, several bond wires and various transitions to connect each element are optimally designed to keep transmission loss low and module compact in size. The LTCC is composed of 6 layers of Dupont DP-943 with relative permittivity of 7.1. The thickness of each layer is 100 um. The implemented module is $20{\times}7.5{\times}1.5\;mm^3$ in size and shows an overall noise figure of 4.8 dB, an overall down conversion gain of 19.83 dB, input P1 dB of -22.8 dBm and image rejection value of 36.6 dBc. Furthermore, experimental results demonstrate that the receiver module is suitable for detection of Digital TV signal transmitted after up-conversion of $560\~590\;MHz$ band to 40 GHz.