• 제목/요약/키워드: Modulator

검색결과 1,283건 처리시간 0.031초

${\sum}-{\Delta}$ modulator의 구조를 갖는A/D 변환기 설계 (A Design on the A/D converter with architective of ${\sum}-{\Delta}$)

  • 윤정식;정정화
    • 한국통신학회논문지
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    • 제28권1C호
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    • pp.14-23
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    • 2003
  • 본 논문에서는 2 Ms/s의 데이터 rate와 12-비트의 해상도를 갖는 Sigma-delta modulator의 구조를 제안한다. Sigma-delta modulator는 oversampling과 노이즈 shaping의 두 가지 특성으로 인해 낮은 해상도의 A/D 변환기와 결합하여 높은 해상도를 갖는 A/D 변환기의 구현이 가능하다는 장점으로 audio 응용 분야에 널리 사용되어 왔다. 그러나, Sigma-delta modulator를 무선 데이터 통신 등 다양한 응용 분야에서 사용하기 위해서는 좀더 높은 데이터 rate를 갖는 Sigma-delta modulator에 관한 연구가 필요하게 되었다. 본 논문에서 제안한 Sigma-delta modulator 구조는 기존의 64 내지 256의 oversampling비를 16으로 낮추어 sampling을 하여 기존의 수 십에서 수 백 Ks/s정도의 데이터 rate를 1 Ms/s 이상의 높은 데이터 rate에서 동작하도록 하였다. 그리고 두 개의 2차 Sigma-delta modulator를 Cascade 구조로 연결하고, 이득을 최적화하여 4차의 Sigma-delta modulator와 유사한 결과를 얻을 수 있었다. 내부에는 1-비트 A/D, D/A 변환기를 채용하여 부가적인 calibration 회로가 필요 없도록 하였다.

새로운 구조의 Tunable 4차 SC Bandpass Sigma-Delta 변조기 (Tunable Bandpass 4th Order SC Sigma-delta Modulator with Novel Structure)

  • 김재붕;유남희;조성익
    • 전기학회논문지
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    • 제60권2호
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    • pp.446-450
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    • 2011
  • Tunable SC(Switched Capacitor) bandpass ${\Sigma}-{\Delta}$(Sigma-Delta) modulator used in wireless system receiver occurs a signal attenuation according to tuning of center frequency in signal bandwidth. In this paper, tunable bandpass 4th order SC bandpass ${\Sigma}-{\Delta}$ modulator with novel structure is proposed for rejection of signal attenuation in signal bandwidth. The existing structure uses a ten variable coefficient values for rejection of signal reduction in the modulator. But the proposed structure only use a two variable coefficient values for rejection of signal attenuation in the modulator. Also, an adder and comparator is replaced with a comparator having 4 inputs in the modulator. Therefore, the existing structure has one more OP-AMP. The purposed modulator was designed in $0.18\;{\mu}m$ CMOS technology. The resolution of the modulator within 310 kHz bandwidth and 40 MHz sampling frequency under 6.67 MHz, 10 MHz and 13.33 MHz intermediate frequency are over 10 bit.

Twisted Nematic LC Modulator for TFT Array Inspection

  • Bae, B.S.;Park, D.H.;Lee, H.K.;Lee, S.E.;Kim, S.H.;Jeong, D.H.;Rho, B.G.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.290-292
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    • 2007
  • A twisted nematic type liquid crystal electro-optic modulator (TN-LC modulator) was developed. The modulator used single polarizer and the reflection on-off ratio was maximized by optimization of twist angle and retardation of liquid crystal cell. The TNLC modulator shows better sensitivity and response time than conventional liquid crystal modulator.

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고속 DWA의 동작시간을 개선한 1.2V $3^{rd}$ 4bit 시그마 델타 변조기 설계 (The Design of 1.2V $3^{rd}$ Order 4bit Sigma Delta Modulator with Improved Operating Time of High Speed DWA)

  • 이순재;김선홍;조성익
    • 전기학회논문지
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    • 제57권6호
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    • pp.1081-1086
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    • 2008
  • This paper presents the $3^{rd}$ 4bit sigma delta modulator with the block and timing diagrams of DWA(Data Weighted Averaging) to optimize a operating time. In the modulator, the proposed DWA structure has a stable operation and timing margin so as to remove three latches and another clock. Because the modulator with proposed DWA structure improve timing margin about 23%. It can increase sampling frequency up to 244MHz. Through the MATLAB modeling, the optimized coefficients are obtained to design the modulator. The fully differential SC integrators, DAC, switch, quantizer, and DWA are designed by considering the nonideal characteristics. The designed $3^{rd}$ order 4bit modulator has a power consumption of 40mW and SNR(signal to noise ratio) of 77.2dB under 1.2V supply and 64MHz sampling frequency.

Current Modulator를 이용하여 유효커패시턴스를 크게 하는 위상고정루프 (Increased Effective Capacitance with Current Modulator in PLL)

  • 김혜진;최영식
    • 전자공학회논문지
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    • 제53권4호
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    • pp.136-141
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    • 2016
  • 본 논문에서는 Current Modulator를 이용하여 루프 필터 커패시턴스 유효 용량을 배가 시켜 칩 크기를 줄일 수 있는 위상 고정루프를 제안하였다. 제안된 위상고정루프에서는 Current Modulator로 루프 필터의 커패시턴스 유효 용량을 배가 시켜 루프 필터 커패시터 크기를 1/10로 줄였다. 제안된 위상고정루프는 1.8V $0.18{\mu}m$ CMOS 공정을 이용하여 설계되었다. 시뮬레이션 결과는 기존 구조와 같은 잡음 특성과 위상고정 시간을 보여주었다.

2차 멀티비트 Sigma-Delta 변조기 설계 및 제작 (Design and Fabrication of Second-Order Multibit Sigma-Delta Modulator)

  • 김선홍;최석우;조성익;김동용
    • 대한전기학회논문지:시스템및제어부문D
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    • 제53권9호
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    • pp.650-656
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    • 2004
  • This paper presents block and timing diagrams of the DWA(data weighted averaging) to optimize a feedback time delay of the sigma-delta modulator. Through the Matlab modeling, the optimized coefficients of the integrators are obtained to design the modulator. And then the fully differential SC integrators, feedback DAC, 9-level quantizer, and DWA are designed by considering the nonideal characteristics of the modulator. The designed second-order multibit modulator is fabricated in a 0.35$\mu\textrm{m}$ CMOS process. The designed modulator achieves 73dB signal-to-noise ratio and 72dB dynamic range at 1.2Vp-p 585kHz input singal and 52.8MHz sampling frequency.

자기정열 방식을 이용한 X-cut LiNbO$_3$ 광 변조기 제작과 특성 (Fabrication and characterization of X-cut LiNbO$_3$optical modulator using self-aligned method)

  • 강기성;채기병;소대화
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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    • pp.54-57
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    • 1992
  • An electro-optical single modulator is fabricated in X-cut LiNbO$_3$by the annealed proton exchange and self-aligned method. First, the effect of annealing is characterized by examining single optical modulator. It is found that by controlling the annealing time, the single optical modulator can be made widely variable. The on-off state of modulator is performed by annealing process and self-aligned electrodes are used in fabricating the single modulator. The optical single modulator has very good figures of merits : the measured on-off switching voltage of about 2.7V.

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PLS-II 용 반도체 스위치 기반 키커 펄스 모듈레이터 설계 및 제작 (Design and Implementation of Solid-State Kicker Modulator for PLS-II)

  • 안석호;공형섭;박웅화;이병준
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2019년도 전력전자학술대회
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    • pp.307-308
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    • 2019
  • The Pohang Light Source (PLS) - II is a 3 GeV third-generation synchrotron radiation facility. To inject electron beam from LINAC, a kicker modulator system and kicker magnets are installed in the PLS-II storage ring tunnel. The injected beam then falls into the storage ring beam dynamic aperture. This paper describes the design and implementation of the solid-state kicker modulator for PLS-II. The solid-state kicker modulator is consisted of high voltage solid state switch stacks. the technical considerations of the solid-state switch stacking for kicker modulator is discussed. The achieved capability of the solid-state kicker modulator demonstrates that is fulfills the design requirement of providing half-sine pulsed current of 10kA (peak), 6us (Base-width), with jitter < 2ns (Standard deviation). simulation and experimental results are presented to demonstrate the performance of the solid-state kicker modulator.

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Truncated cosine sries functions 를 이용한 SAW AWQPSK 변조기 (SAW AWQPSK Modulator Using The Classical Truncated Cosine Series Functions)

  • 조용훈
    • 한국음향학회:학술대회논문집
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    • 한국음향학회 1987년도 학술발표회 논문집
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    • pp.93-97
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    • 1987
  • In this paper a SAW based AWZPSK modulator using the classical truncated cosine series functoins as a baseband pulse is described. A SAW AWQPSK modulator has been designed and fabricated on YZ-LINBO3 substrates. Measured responses meet the theoretical values with tolerable amounts of deviation. This SAW-based device shows good performance as a simple AWQPSK modulator.

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