• 전력전자학회논문지
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• 제23권6호
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• pp.415-423
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• 2018

This study uses a level selection algorithm with fixed sampling frequency for modular multilevel converter (MMC) systems. Theoretically, the proposed method increases the level infinitely while the sampling time remains the same. The proposed method called cluster stream buffer (CSB) consists of several clusters, wherein each cluster is composed of 32 submodules that depend on the level of the submodules in the MMC system. To increase the level of the MMC system, additional clusters are used, and the sampling time between clusters is determined from the sampling time between levels needed for utilizing the entire level from the MMC system. This method is crucial in the control of MMC-type HVDC systems because it improves scalability and precision.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.259-260
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• 2020

모듈화 멀티레벨 컨버터 (modular multilevel converter, MMC)는 고압직류송전(high-voltage direct current, HVDC)에 대한 기술이 발전함에 따라서 이와 관련된 전력변환 장치로써 많은 연구되어지고 있다. 10kV 이하로 구현되는 중압직류송전(medium-volatge direct current, MVDC) 시스템 및 모터 드라이브에 이용되는 MMC의 경우에는 수백 개의 직렬 서브모듈로 구성된 MMC가 사용되는 HVDC와 다르기 때문에 여러 모듈레이션 방식에서의 다른 장단점을 가지게 된다. 본 논문에서는 전력전자 시뮬레이션 툴인 PSIM을 이용하여 여러가지 모듈레이션의 MVDC으로의 적용에 있어서의 장단점을 분석한다.

• 전기학회논문지
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• 제64권2호
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• pp.232-239
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• 2015

Faced with unbalanced grid operation mode, the high voltage direct current (HVDC) based on voltage source converter (VSC) can be properly controlled by a dual current control scheme. For the modular multilevel converter (MMC) controlling the AC side current is able to limit the arm current which flows along the IGBT of submodule (SM) to rated current. However the limitation of the arm current results in leaving the control range of active power at MMC confined to below the rated capacity. As a result, limiting the arm current causes the problem that the DC side voltage of the HVDC can not be controlled to the reference value since MMC HVDC adjusts the DC side voltage through the active power. In this paper, we propose the algorithm adjusting the active powers of both MMCs to resolve the problem. The back-to-back MMC HVDC applying the algorithm is modeled by PSCAD/EMTDC to verify the algorithm.

• Journal of Power Electronics
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• 제19권4호
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• pp.922-933
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• 2019

The arm inductance (AI) of a modular multilevel converter (MMC) affects both the fault and circulating current magnitudes. In addition, it has an impact on the inverter efficiency and harmonic content. In this study, the AI of a three-phase MMC is optimized in a novel way in terms of DC voltage utilization, harmonics and efficiency. This MMC has 10 submodules (SM) per arm and the power circuit topology of the SM is a half-bridge. The optimum AI is adopted and verified in an MMC that has 100 SMs per arm. Then the phase shift (PS) and phase disposition (PD) pulse width modulation (PWM) methods are investigated for better DC voltage utilization, efficiency and harmonics. It is found that similar performances are obtained for both modulation techniques in terms of DC voltage utilization. However, the total harmonic distortion (THD) of the PS-PWM is found to be 0.02%, which is slightly lower than the THD of the PD-PWM at 0.16%. In efficiency calculations, the switching and conduction losses for all of the semiconductor are considered separately and the minimum efficiency of the 100-SM based MMC is found to be 99.62% for the PS-PWM and 99.64% for the PD-PWM with the optimal value of the AI. Simulation results are verified with an experimental prototype of a 6-SM based MMC.

• Journal of Power Electronics
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• 제16권2호
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• pp.522-531
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• 2016

This paper proposes a new NLC (Nearest Level Control) scheme for MMCs (Modular Multilevel Converters), which offers voltage ripple reductions in the DC capacitor of the SM (Sub-Module), the output voltage harmonics, and the switching losses. The feasibility of the proposed NLC was verified through computer simulations. Based on these simulation results, a hardware prototype of a 10kVA, DC-1000V MMC was manufactured in the lab. Experiments were conducted to verify the feasibility of the proposed NLC in an actual hardware environment. The experimental results were consistent with the results obtained from the computer simulations.

• Journal of Power Electronics
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• 제16권5호
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• pp.1698-1705
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• 2016

In this paper, a hardware-in-the-loop simulation platform for MMCs is established, which connects a real time digital simulator (RTDS) and a designed MMC controller with optical fiber. In this platform, the converter valves are simulated with a small time step of 2.5 microsecond in the RTDS, and multicore technology is implemented for the controller so that the parallel valve control is distributed between different cores. Therefore, the designed controller can satisfy the requirements of real-time control. The functions of the designed platform and the rationality for the designed controller are verified through experimental tests. The results show that different modulation modes and various control strategies can be implemented in the simulation platform and that each control objective can been tracked accurately and with a fast dynamic response.

• Journal of Electrical Engineering and Technology
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• 제11권4호
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• pp.921-930
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• 2016

This paper proposes a design and control method for a high-voltage direction current modular multilevel converter (HVDC-MMC) considering the capacitor voltage ripple of the submodule (SM). The capacitor voltage ripple consists of the line frequency and double-line-frequency components. The double line- frequency component does not fluctuate according to the active power, whereas the line-frequency component is highly influenced by the grid-side voltage and current. If the grid voltage drops, a conventional converter increases the current to maintain the active power. A grid voltage drops, current increment, or both occur with a capacitor voltage ripple higher than the limit value. In order to reliably control an MMC within a limit value, the SM capacitor should be designed on the basis of the capacitor voltage ripple. In this paper, the capacitor voltage ripple according to the grid voltage and current are analyzed, and the proposed control method includes a current limitation method considering the capacitor voltage ripple. The proposed design and control method are verified through simulation using PSCAD/EMTDC.

• Journal of Power Electronics
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• 제15권3호
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• pp.685-694
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• 2015

The power loss of the controllable switches in modular multilevel converter (MMC) HVDC transmission systems is an important factor, which can determine the design of the operating junction temperatures. Due to the dc current component, the approximate calculation tool provided by the manufacturer of the switches cannot be used for the losses of the switches in the MMC. Based on the enabled probabilities of each SM in an arm, the current analytical models of the switches can be determined. The average and RMS currents can be obtained from the corresponding current analytical model. Then, the conduction losses can be calculated, and the switching losses of the switches can be estimated according to the upper limit of the switching frequency. Finally, the thermal resistance model of the switches can be utilized, and the junction temperatures can be estimated. A comparison between the calculation and PSCAD simulation results shows that the proposed method is effective for estimating the junction temperatures of the switches in the MMC.

• Journal of Power Electronics
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• 제14권6호
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• pp.1109-1118
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• 2014

A Fundamental Frequency Sorting Algorithm (FFSA) is proposed in this paper to balance the voltages of floating dc capacitors for Modular Multilevel Converters (MMCs). The main idea is to change the sequences of the CPS-PWM carriers according to the capacitor voltage increments during the previous fundamental period. Excessive frequent sorting is avoided and many calculating resources are saved for the controller. As a result, more sub-modules can be dealt with. Furthermore, it does not need to measure the arm currents. Therefore, the communication between the controllers can be simplified and the number of current sensors can be reduced. Moreover, the proposed balancing method guarantees that all of the switching frequencies of the sub-modules are equal to each other. This is quite beneficial for the thermal design of the sub-modules and the lifetime of the power switches. Simulation and experimental results acquired from a 9-level prototype verify the viability of the proposed balancing method.

• Journal of Power Electronics
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• 제14권6호
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• pp.1100-1108
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• 2014

Modular multilevel converters (MMCs) have emerged as the most promising topology for high and medium voltage applications for the coming years. However, one particular negative characteristic of MMCs is the existence of circulating current, which contains a dc component and a series of low-frequency even-order ac harmonics. If not suppressed, these ac harmonics will distort the arm currents, increase the power loses, and cause higher current stresses on the semiconductor devices. Repetitive control (RC) is well known due to its distinctive capabilities in tracking periodic signals and eliminating periodic errors. In this paper, a novel circulating current control scheme base on RC is proposed to effectively track the dc component and to restrain the low-frequency ac harmonics. The integrating function is inherently embedded in the RC controller. Therefore, the proposed circulating current control only parallels the RC controller with a proportional controller. Thus, conflicts between the RC controller and the traditional proportional integral (PI) controller can be avoided. The design methodologies of the RC controller and a stability analysis are also introduced. The validity of the proposed circulating current control approach has been verified by simulation and experimental results based on a three-phase MMC downscaled prototype.