• Title/Summary/Keyword: Micro-tec

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Analysis of subthreshold region transport characteristics according to channel doping for DGMOSFET using MicroTec (MicroTec을 이용한 DGMOSFET의 채널도핑에 따른 문턱전압이하영역 특성분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jong-In;Jeong, Dong-Soo;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.715-717
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    • 2010
  • In this paper, the subthreshold characteristics have been alanyzed using MicroTec4.0 for double gate MOSFET(DGMOSFET). The DGMOSFET is extensively been studing since it can reduce the short channel effects due to structural characteristics. We have presented the short channel effects such as subthreshold swing and threshold voltage for DGMOSFET, using MicroTec, semiconductor simulator. We have analyzed for channel length, thickness and width to consider the structural characteristics for DGMOSFET. The subthreshold swing and threshold voltage have been analyzed for DGMOSFET using MicroTec since MicroTec is well verified as comparing with results of the numerical three dimensional models.

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Comparison on Micro-Tec and TCAD simulators for device simulation (소자 시뮬레이션을 위한 Micro-Tec과 TCAD의 비교 분석)

  • 심성택;장광균;정정수;정학기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.321-324
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    • 2001
  • The metal-oxide-semiconductor field-effect transistor(MOSFET) has undergone many changes in the last decade in response to the constant demand for increased speed, decreased power, and increased packing density. This paper has compared Micro-Tec with ISE-TCAD. This paper investigates LDD MOSFET using two simulators. Bias condition is applied to the devices with gate lengths 180nm. We have presented MOSF ET's characteristics such as I-V characteristic, electric field. and compared with Micro-Tec and ISE-TCAD.

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Analysis of the MOSFET Transport Characteristics using MicroTec Tool (MicroTec을 이용한 MOSFET 전송 특성 분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.596-599
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    • 2008
  • 본 연구에서는 MicroTec을 이용하여 MOSFET 전송 특성을 분석하였다. MicroTec의 Semsim은 디바이스 시뮬레이터로써 입력 바이어스에 의해 공정 시뮬레이션인 SiDif와 디바이스 조립인 MergIC에 의해 소자를 시뮬레이션 한다. 소자에 대한 스케일링은 정전압 스케일링을 사용하였고, 채널의 길이는 100nm, 50nm, 25nm로 변화하면서 비교 분석하였다. MicroTec의 이동도 모델중 Lombardi, Constant, Yamaguchi 모델을 선택하여 이동도 모델을 비교하였다. 전류-전압 특성 곡선을 비교하였을때 Lombardi 모델과 Yamaguchi 모델보다 Constant 모델에서 결과값이 높게 나타는 것을 알 수 있었다. 또한 MicroTec의 유용성을 조사하여 시뮬레이터로서 적합함과 나노구조 소자의 스케일링 이론의 적합함을 보았다.

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Comparison on commercial simulators for nano-structure device simulation- For ISE-TCAD and Micro-tec - (나노 구조 소자 시뮬레이션을 위한 상용 시뮬레이터의 비교 분석 - ISE-TCAD와 Micro-tec을 중심으로 -)

  • 심성택;임규성;정학기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.1
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    • pp.103-108
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    • 2002
  • The metal-oxide-semiconductor field-effect transistor(MOSFET) has undergone many changes in the last decade In response to the constant demand for increased speed, decreased power, and increased packing density. The state -of-the-art simulation programs are developed by engineers and scientists. This paper has compared commercial programs of Micro-tec and ISE-TCAD in device simulation. This paper investigates LDD MOSFET using two simulators. Bias condition is applied to the devices with gate lengths(Lg) 180㎚. We have presented MOSFET's characteristics such as I-V characteristic and electric field, and compared Micro-tec with ISE TCAD.

Fabrication of a Micro Cooler using Thermoelectric Thin Film (열전박막을 이용한 마이크로 냉각소자 제작)

  • Han, S.W.;Choi, H.J.;Kim, B.I.;Kim, B.M.;Kim, D.H.;Kim, O.J.
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.1459-1462
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    • 2007
  • In general a thermoelectric cooler (TEC) consists of a series of P type and N type thermoelectric materials sandwiched between two wafers. When a DC current passes through these materials, three different effects take place; Peltier effect, Joule heating effect and heat transfer by conduction due to temperature difference between hot and cold plates. In this study we have developed a micro TEC using $Bi_2Te_3$ (N type) and $Bi_{0.5}Sb_{1.5}Te_3$ (P type) thin films. In order to improve that performance of a micro TEC, we made 10 um height TE legs using special PR only for lift-off. We measured COP (coefficient of performance) and temperature difference between hot and cold connectors with current.

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Analysis of the MOSFET IV characteristic curve Process using MicroTec Tool (MicroTec을 이용한 MOSFET IV특성곡선 분석)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.730-733
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    • 2008
  • 본 연구에서는 MicroTec을 이용하여 MOSFET IV특성곡선을 분석하였다. 일반적으로 MOSFET은 4단자로 구성되며, 금속-산화물-반도체부분(또는 MOS커패시터 부분)이 트랜지스터의 핵심을 이루고 있다. MicroTec을 사용하여 Process한 모델을 바탕으로 MOSFET의 IV특성곡선을 분석하기 위해서 각각의 Directive와 Subdirective에 파라미터값을 지정하고 파라미터값의 변화에 따라 IV특성 곡선의 변화를 분석하였다. 드레인전류와 게이트 소스전압, 드레인 소스 전압 사이의 관계를 수학적으로 유도할 것이다. 전류-전압 관계에서 나타나는 2개의 특성변수는 소스와 드레인 사이의 거리인 채널의 길이와 폭이다.

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Analysis of Current-voltage Characteristic Curve for the Solar Cell using MicroTec Tool (MicroTec을 이용한 태양전지 전류-전압 특성곡선 분석)

  • Jung, Hak-Kee;Han, Ji-Hyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.6
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    • pp.1045-1050
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    • 2009
  • The current-voltage characteristics of solar cell has been analyzed using MicroTec in this paper. The current-voltage characteristics represents a efficiency of solar cell. The part of metal contact is doped highly, but active region is doped lowly. We have investigated the current-voltage characteristics according to variation of doping concentration from $10^{14}cm^{-3}$ to $10^{17}cm^{-3}$. We has also determined the doping concentration to obtain the maximum efficiency of solar cell, and analyzed this current-voltage characteristics.

Design of the 25nm LDD MOSFET Process using MicroTec Tool (MicroTec을 이용한 25nm LDD MOSFET Process 설계)

  • Han, Ji-Hyung;Jung, Hak-Kee;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.588-591
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    • 2008
  • 본 연구에서는 MicroTec을 이용하여 25nm LDD MOSFET Process를 구현하였다. LDD MOSFET의 저농도 도핑은 드레인의 끝에서 발생할 수 있는 핫 캐리어 효과를 감소시키는데 도움을 주며, 낮은 접합깊이는 DIBL 효과 및 전하공유와 같은 단채널효과를 감소시키는 중요한 역할을 한다. MicroTec 툴의 Sidif를 사용하여 25nm LDD MOSFET process를 설계하였고, 시뮬레이션 하는 과정과 방법을 설명하였다. 이온주입 양과 에너지의 크기를 증가하면서 전체도핑농도를 비교 분석하였다. 이온주입 양을 증가시키고 에너지의 크기가 커지면 더 강한 에너지가 가해지게되므로 높게 도핑되는 영역이 확장되고 전체 농도분포도 역시 확장되는걸 알 수 있었다.

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Multi-physics analysis for the design and development of micro-thermoelectric coolers

  • Han, Seung-Woo;Hasan, MD Anwarul;Kim, Jung-Yup;Lee, Hyun-Woo;Lee, Kong-Hoon;Kim, Oo-Joong
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.139-144
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    • 2005
  • A rigorous research is underway in our team, for the design and development of high figure of merits (ZT= 1.5${\sim}$2.0) micro-thermoelectric coolers. This paper discusses the fabrication process that we are using for developing the $Sb_2Te_3-Bi_2Te_3$ micro-thermoelectric cooling modules. It describes how to obtain the mechanical properties of the thin film TEC elements and reports the results of an equation-based multiphysics modeling of the micro-TEC modules. In this study the thermoelectric thin films were deposited on Si substrates using co-sputtering method. The physical mechanical properties of the prepared films were measured by nanoindentation testing method while the thermal and electrical properties required for modeling were obtained from existing literature. A finite element model was developed using an equation-based multiphysics modeling by the commercial finite element code FEMLAB. The model was solved for different operating conditions. The temperature and the stress distributions in the P and N elements of the TEC as well as in the metal connector were obtained. The temperature distributions of the system obtained from simulation results showed good agreement with the analytical results existing in literature. In addition, it was found that the maximum stress in the system occurs at the bonding part of the TEC i.e. between the metal connectors and TE elements of the module.

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Current-voltage characteristics of the junction depth D-MOS using MicroTec Tool (MicroTec을 이용한 D-MOS 접합깊이에 따른 전류-전압 특성)

  • Kim, Seong-Jong;Han, Ji-Hyeong;Jung, Hak-Kee;Lee, Jong-In;Cheong, Dong-Soo;Kwon, Oh-Sin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.830-832
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    • 2010
  • 본 논문에서는 MicroTec을 이용하여 D-MOS(double-diffusion MOS) 트랜지스터의 접합깊이에 변화를 주어 그에 따른 전류-전압 특성 곡선을 분석하였다. D-MOS는 채널의 길이를 줄이고 높은 항복 전압을 얻기 위해 이중 확산 도핑을 하는 것을 특징으로 하며 연속적으로 확산 공정을 두 번 진행하여 채널 길이를 짧게 하고 이에 의해 고전압과 고전류를 인가할 수 있는 장점을 가진다. 본 연구에서는 D-MOS의 접합깊이에 변화를 주고 이에 따른 전류와 전압의 특성을 비교하여 분석하였다.

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