• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.6
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• pp.648-654
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• 2003

Diamond MIS(Metal-Insulator-Semiconductor) diodes and MISFETs(Metal-Insulator-Semiconductor Field Effect Transistors) were fabricated by employing various fluorides as gate insulator, and their electrical properties were closely investigated by means of C-V measurements. The A1/BaF$_2$/diamond MIS structure exhibited outstanding electrical properties. The MIS diode showed a very low surface state density of ∼10$\^$10//$\textrm{cm}^2$ eV near the valence band edge, and the observed effective mobility(${\mu}$$\_$eff/) of the MISFET was 400 $\textrm{cm}^2$/Vs, which is the highest value obtained until now in the diamond FET. From the chemiphysical point of view, the above result might be explained by the reduction of adsorbed-oxygen on the diamond surface via strong chemical reaction by the constituent Ba atom in the insulator during the film deposition(Oxygen-Gettering Effect).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.7
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• pp.533-538
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• 2001

The barrier height is found to increase from 0.25 to 0.690 eV for Schottky contacts on n-InGaAs using deposition of Ag on a substrate cooled to 77K(LT). Surface analysis leads to an interface model for the LT diode in which there are oxide compounds of In:O and As:O between the metal and semiconductor, leading to behavior as a metal-insulator-semiconductor diode. The metal film deposited t LT has a finer and more uniform structure, as revealed by scanning electron microscopy and in situ metal layer resistance measurement. This increased uniformity is an additional reason for the barrier height improvement. In contrast, the diodes formed at room temperature exhibit poorer performance due to an unpassivated surface and non-uniform metal coverage on a microscopic level.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.5
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• pp.365-370
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• 2000

Schottky contacts on n-In$\_$0.53//Ga$\_$0.47//As have been made by metal deposition on substrates cooled to a temperature of 77K. The current-voltage and capacitance-voltage characteristics showed that the Schottky diodes formed at low temperature had a much improved barrier height compared to those formed at room temperature. The Schottky barrier height ø$\_$B/ was found to be increased from 0.2eV to 0.6eV with Ag metal. The saturation current density of the low temperature diode was about 4 orders smaller than for the room temperature diode. A current transport mechanism dominated by thermionic emission over the barrier for the low temperature diode was found from current-voltage-temperature measurement. Deep level transient spectroscopy studies exhibited a bulk electron trap at E$\_$c/-0.23eV. The low temperature process appears to reduce metal induced surface damage and may form an MIS (metal-insulator-semiconductor)-like structure at the interface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.242-242
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• 2010

산화 알루미늄($Al_2O_3$) 박막을 p-type Czochralski(CZ) Si 위에 Remote Plasma Atomic Layer Deposition(RPALD)을 이용하여 저온 공정으로 증착하였다. Photolithography 공정으로 grid 패턴을 형성한 후 열 증착기로 알루미늄을 증착하여 MIS-IL (Metal-Insulator-Semiconductor Inversion Layer) solar cell을 제작하였다. 반응소스로는 Trimethylaluminum (TMA)과 $O_2$를 이용하였다. $Al_2O_3$ 박막의 전기적 특성 평가를 위해 MIS capacitor를 제작하여 Capacitance-voltage (C-V), Current-voltage (I-V), Interface state density ($D_{it}$)를 평가하였으며 Solar simulator를 이용하여 MIS-IL Solar cell의 Efficiency을 측정하였다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.8
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• pp.1401-1405
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• 2010

We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $HfO_2$/p-Si structures. The $HfO_2$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. TEMAHf and $H_2O$ were used as the hafnium and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TEMAHf pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $HfO_2$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.221-224
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• 2000

We have successfully demonstrated metal-ferroel-ectric-insulator-semiconductor (MFIS) devices using Al/LiNbO$_{3}$/SiN/Si structure. The SiN thin films were made into metal -insulator- semiconductor (MIS) devices by thermal evaporation of aluminum source in a dot away on the surface. The interface property of MFIS from 1MHz & quasistatic C-V is good and the memory window width is about 1.5V at 0.2V/s signal voltage sweep rate. The gate leakage current density of MFIS capacitors using a aluminum electrode showed the least value of 1x10$^{-8}$ A/$\textrm{cm}^2$ order at the electric field of 300㎸/cm. And the XRD patterns shows the probability of applications of LN for MFIS devices for FeRAMs on amorphous SiN buffer layer.

• ETRI Journal
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• v.17 no.4
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• pp.1-12
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• 1996

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.12
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• pp.2420-2424
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• 2009

We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $Al_2O_3/p-Si$ structures. The $Al_2O_3$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. Trimethylaluminum [$Al(CH_3)_3$, TMA] and $H_2O$ were used as the aluminum and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TMA pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $Al_2O_3$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

• Korean Journal of Materials Research
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• v.27 no.7
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• pp.364-368
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• 2017

We performed temperature dependent current-voltage (I-V) measurements to characterize the electrical properties of $Au/Al_2O_3/n-Ge$ metal-insulator-semiconductor (MIS) diodes prepared with and without $H_2O$ prepulse treatment by atomic layer deposition (ALD). By considering the thickness of the $Al_2O_3$ interlayer, the barrier height for the treated sample was found to be 0.61 eV, similar to those of Au/n-Ge Schottky diodes. The thermionic emission (TE) model with barrier inhomogeneity explained the final state of the treated sample well. Compared to the untreated sample, the treated sample was found to have improved diode characteristics for both forward and reverse bias conditions. These results were associated with the reduction of charge trapping and interface states near the $Ge/Al_2O_3$ interface.

• Journal of Information Display
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• v.9 no.2
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• pp.1-4
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• 2008

In this study, we investigate the capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (MIS) capacitors consisting of pentacene, as an organic semiconductor, and polymeric insulators such as poly(4-vinylphenol) (PVP) orpolystyrene (PS) prepared by spin-coating process, to analyze the interfacial characteristics between pentacene and polymeric insulators. Compared with the device with PS, the MIS capacitor with PVP exhibited a pronounced shift in the flat-band voltage according to the bias sweep direction. This hysteric feature in the C-V characteristics is thought to be attributed to the trapped charges at the interface between pentacene and PVP owing to the hydrophilicity of PVP. From the experimental results, we can conclude that surface polarity of polymeric insulator has a critical effect on the interfacial properties, thereby affecting the bias stability of organic thin-film transistors.