• Proceedings of the Korea Multimedia Society Conference
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• 2004.05a
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• pp.199-202
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• 2004

데이터 방송은 지상파, 위성, 케이블 둥의 방송망을 이용하여 하나의 송신자가 다수의 수용자에게 디지털 멀티미디어 컨텐츠를 여러 종류의 단말기에 전송하는 것으로 컨텐츠는 프로그램에 연동되는 서비스 및 비연동형 서비스, 또는 대화형 서비스 헝태로 제공되는 다양한 서비스를 포함한다. 방송망을 이용한 데이터방송의 전송 규약은 DSM-CC에서 정의한 캐로셀(carousel) 형태로 전송된다. 캐로셀은 주기적으로 반복 전송되는 데이터 모듈을 가리키며, 캐로셀로 전송되는 데이터 중에는 MPEG-2 비디오로 인코딩되어 광고와 배경 이미지 등으로 사용할 수 있는 영상 데이터가 있다. 이 MPEG-2 비디오 영상 데이터를 TV화면에 출력하기 위해 셋톱박스의 미들웨어는 썬 마이크로시스템즈(Sun Microsystems)에서 만든 자바 기반의 JMF(Java Media Framework) 플레이어를 통해 화면에 출력한다 이렇게 제공되는 MPEG-2 비디오 영상 데이터를 비디오 드립(drips)이라 하고, 비디오 드립을 JMF 플레이어를 통해 화면에 출력하는 모드를 드립피드(drip-feed) 모드라 한다. 그러나 MHP용 셋톱박스를 위한 JMF 버전 1.0은 그대로 사용 할 수 없다. 비디오 드립 모드를 위한 구현이 없기 때문에 별도의 확장을 통해 비디오 드립을 지원하거나, 네이티브(Native) 메소드를 만들어 JMF를 확장하는 방식을 제공해야 한다. 본 논문에서는 데이터 캐로셀로 전송되는 비디오 드림 모드를 구현하기 위해 네이티브 코드로 JMF를 확장해서 비디오 드립을 JMF 플레이어를 통해 TV 화면에 출력하는 MPEG-2 비디오 드립 디코더를 설계하고 구현하였다.

• Smart Media Journal
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• v.1 no.1
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• pp.27-35
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• 2012

In this paper, the performance analysis for multimedia video codec(MPEG-4, H.264) on on-chip network communication architecture is presented. The On-Chip Network (OCN) is the new communication architecture of multimedia SoC design that overcomes the limits of On-Chip Bus architecture by providing higher data traffic bandwidth, reusability and higher scalability. We compared the performance of MPEG-4, H.264 decoder based on-chip network and AMBA on-chip bus. Experimental results show that the performance of MPEG-4, H.264 based on on-chip network is improved over 33~56% compared to the design based on AMBA on-chip bus.

• Journal of IKEEE
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• v.19 no.1
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• pp.1-9
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• 2015

This paper proposes the design of sub-pixel interpolation circuit for real-time multi-decoder supporting 4K-UHD video images. The proposed sub-pixel interpolation circuit supports H.264, MPEG-4, VC-1 and new video compression standard HEVC. The common part of the interpolation algorithm used in each video compression standard is shared to reduce the circuit size. An intermediate buffer is effectively used to reduce the circuit size and optimize the performance. The proposed sub-pixel interpolation circuit was synthesised by using 130nm standard cell library. The synthesized gate-level circuit consists of 122,564 gates and processes 35~86 image frames per second for 4K-UHD video at the maximum operation frequency of 200MHz. Therefore, the proposed circuit can process 4K-UHD video in real time.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2008.11a
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• pp.251-253
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• 2008

최근 유럽에서 DVB-T HDTV 방송 표준이 정하지면서 오디오 포맷으로 HE-AAC가 채택되었다. HE-AAC는 압축효율은 높지만 연산량이 높아 낮은 성능의 DSP에서 수행하기에는 어려움이 있다. DVB-T에서는 5.1채널을 사용하고 있어 더욱더 많은 연산을 필요로 한다. 본 논문은 ISO/DEC 14496-3 MPEG4 HE(High Efficiency)-AAC의 Level4에 해당하는 Multichannel Decoder를 최적화하여 구현하고. 가장 많은 연산을 필요로 하는 Synthesis Filter Bank에 제안된 알고리즘을 적용하여 연산량을 줄였고 대부분의 연산부를 어셈블리로 코드 최적화를 하여 작은 성능의 DSP를 사용하여 실시간 Multichannel HE-AAC Audio Decoder의 구현이 가능하게 하였다. DVB-T 오디오 시스템에 필수로 필요한 Audio Description, Dynamic Range Control, Downmix 등을 함께 구현하여 실제 수신기에 사용이 가능하도록 하였다. DSP는 Samsung의 CalmRISC16 + MAC24 core 를 사용하였다.

• The Journal of the Acoustical Society of Korea
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• v.26 no.5
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• pp.214-219
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• 2007

This paper proposes a new IFFT(Inverse Fast Fourier Transform) algorithm, which is proper for IMDCT(Inverse Modified Discrete Cosine Transform) of MPEG-2 AAC(Advanced Audio Coding) decoder. The $2^n$(N-point) type IMDCT is the most powerful among many IMDCT algorithms, however it includes IFFT that requires many calculation cycles. The IFFT used in $2^n$(N-point) type IMDCT employ the bit-reverse data arrangement of inputs and N/4-point complex IFFT to reduce the calculation cycles. We devised a new data arrangement method of IFFT input and $N/4^{n+1}$-type IFFT and thus we can reduce multiplication cycles, addition cycles, and ROM size.

• The Journal of the Korea institute of electronic communication sciences
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• v.5 no.1
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• pp.23-30
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• 2010

The H.264/AVC is increasingly used in broadcast video applications such as Internet Protocol television (IPTV), digital multimedia broadcasting (DMB) because of high compression performance. But the H.264/AVC coded video can be delivered to the widespread end-user equipment for MPEG-2 after transcoding between this video standards. This paper suggests a new transcoding algorithm for H.264/AVC to MPEG-2 transcoder that uses motion vector clustering in order to reduce the complexity without loss of video quality. The proposed method is exploiting the motion information gathered during h.264 decoding stage. To reduce the search space for the MPEG-2 motion estimation, the predictive motion vector is selected with a least distortion of the candidated motion vectors. These candidate motion vectors are considering the correlation of direction and distance of motion vectors of variable blocks in H.264/AVC. And then the best predictive motion vector is refined with full-search in ${\pm}2$ pixel search area. Compared with a cascaded decoder-encoder, the proposed transcoder achieves computational complexity savings up to 64% with a similar PSNR at the constant bitrate(CBR).

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.1
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• pp.79-86
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• 1996

In this paper we propose an architecture for VLC(Variable Length Coder) and VLD(Variable Length Decoder) which is simple with respect to implementation point and efficient in memory. We implemented encoding and decoding circuit where we need only 7-bit address memory space for 114 MPEG1 DCT coefficients and employed minimal number of flip-flops and logics for an architecture to integrate a shift register for serial-to-parallel or parallel-to-serial conversion of the data in code mapping ROM. We obtained 50Mbps operating speed in both encoding and decoding process as the result of simulation using 0.80.8${\mu}m$ CMOS standard cells.

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.4
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• pp.309-318
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• 2004

This paper proposes the H.264-based selective fine granular scalable (FGS) coding scheme that selectively uses the temporal prediction data in the enhancement layer. The base layer of the proposed scheme is basically coded by the H.264 (MPEG-4 Part 10 AVC) visual coding scheme that is the state-of-art in codig efficiency. The enhancement layer is basically coded by the same bitplane-based algorithm of the MPEG-4 (Part 2) fine granular scalable coding scheme. In this paper, we introduce a new algorithm that uses the temproal prediction mechanism inside the enhancement layer and the effective selection mechanism to decide whether the temporally-predicted data would be sent to the decoder or not. Whenever applying the temporal prediction inside the enhancement layer, the temporal redundancies may be effectively reduced, however the drift problem would be severly occurred especially at the low bitrate transmission, due to the mismatch bewteen the encoder's and decoder's reference frame images. Proposed algorithm selectively uses the temporal-prediction data inside the enhancement layer only in case those data could siginificantly reduce the temporal redundancies, to minimize the drift error and thus to improve the overall coding efficiency. Simulation results, based on several test image sequences, show that the proposed scheme has 1∼3 dB higher coding efficiency than the H.264-based FGS coding scheme, even 3∼5 dB higher coding efficiency than the MPEG-4 FGS international standard.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.1
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• pp.95-100
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• 2005

This paper proposes a DVS method which effectively reduces the power consumption of multimedia signal processor. Analytic derivations of effective range of its power saving factor are obtained with the assumption of a Gaussian distribution for the frame-based computational burden of the multimedia processor. A closed form equation of the power saving factor is derived in terms of the mean-standard deviation of the distribution. An MPEG-2 video decoder algorithm and AAC encoder algorithm are tested on ARM9 RISC processor for the experimental verification of the power saying of the proposed DVS approach. The experimental results with diverse MPEG-2 video and audio files show 50～30% power saving factor and show good agreement with those of the analytically derived values.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1B
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• pp.117-124
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• 2004

With MPEG-4 3D mesh coding(3DMC), the problem of the need of a wide bandwidth can be solved to store and transmit 3D information because of its high compression rate. And to realize the 3D information service with broadcasting or internet, one needs to transmit not only the 3D contents but also the 3D player. Therefore, in this paper we implement a 3D player based on MPEG-4 using a java language. A well-known java language employed in this paper provides the player with a wider range of applications, for example, when the O/S or the platform are different, due to its properties of scalability and universality. The implemented player which has functions (translation, rotation, etc) that can manipulate contents decodes the 3D contents and displays them. In addition, the player has a network function that receives a 3D content from the server. This paper explains the architecture and characteristics of the player and shows its simulation results.