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Analysis of Power Saving Factor for a DVS Based Multimedia Processor  

Kim Byoung-Il (School of Electrical and Electronics Engineering, Chung-Ang University)
Chang Tae-Gyu (School of Electrical and Electronics Engineering, Chung-Ang University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SP / v.42, no.1, 2005 , pp. 95-100 More about this Journal
Abstract
This paper proposes a DVS method which effectively reduces the power consumption of multimedia signal processor. Analytic derivations of effective range of its power saving factor are obtained with the assumption of a Gaussian distribution for the frame-based computational burden of the multimedia processor. A closed form equation of the power saving factor is derived in terms of the mean-standard deviation of the distribution. An MPEG-2 video decoder algorithm and AAC encoder algorithm are tested on ARM9 RISC processor for the experimental verification of the power saying of the proposed DVS approach. The experimental results with diverse MPEG-2 video and audio files show 50～30% power saving factor and show good agreement with those of the analytically derived values.
Keywords
Low power; voltage scaling; multimedia signal processing;
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