• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.4
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• pp.49-58
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• 2014

A low-swing differential near-ground signaling (NGS) transceiver for low-power high-speed mobile I/O interface is presented. The proposed transmitter adopts an on-chip regulated programmable-swing voltage-mode driver and a pre-driver with asymmetric rising/falling time. The proposed receiver utilizes a new multiple gain-path differential amplifier with feed-forward capacitors that boost high-frequency gain. Also, the receiver incorporates a new adaptive bias generator to compensate the input common-mode variation due to the variable output swing of the transmitter and to minimize the current mismatch of the receiver's input stage amplifier. The use of the new simple and effective impedance matching techniques applied in the transmitter and receiver results in good signal integrity and high power efficiency. The proposed transceiver designed in a 65-nm CMOS technology achieves a data rate of 13 Gbps/channel and 0.3 pJ/bit (= 0.3 mW/Gbps) high power efficiency over a 10 cm FR4 printed circuit board.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.1
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• pp.36-42
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• 2007

A low-power compact driver for multistandard physical layer is presented. The proposed driver achieves low power and small area through the voltage-mode driver with trans-impedance configuration and the novel hybrid driver,. In the voltage-mode driver, a trans-impedance configuration alleviates the problem of limited common-mode range of error amplifiers and the area and power overhead due to pre-amplifier. For a standard with extended output swing, only current sources are added in parallel with the voltage-mode driver, which is named a 'hybrid driver'. The hybrid architecture not only increases output swing but reduces overall driver area. The overall driver occupies $0.14mm^2$. Power consumptions under 3.3-V supply are 24.5 mW for the voltage-mode driver and 44.5 mW for the hybrid driver.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.216-222
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• 2017

The most prominent challenge for MOSFET scaling is to reduce power consumption; however, the supply voltage ($V_{DD}$) cannot be scaled down because of the carrier injection mechanism. To overcome this limit, a new type of field-effect transistor using positive feedback as a carrier injection mechanism (FBFET) has been proposed. In this study we have investigated the electrical characteristics of a $Si_{1-x}Ge_x$ FBFET with one gate and one-sided $Si_3N_4$ spacer using TCAD simulations. To reduce the drain bias dependency, $Si_{1-x}Ge_x$ was introduced as a low-bandgap material, and the minimum subthreshold swing was obtained as 2.87 mV/dec. This result suggests that a $Si_{1-x}Ge_x$ FBFET is a promising candidate for future low-power devices.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.3
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• pp.90-98
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• 2001

In this paper, the development of exclusive control valve for improving the performance of truck cab tilting system is discussed. Cab tilting system is implemented to the heavy truck for the convenience of driver. However when tilting up or down, sudden swing of cab has brought discredit on user. To improve this phenomena it is inevitable to use counter balance valve. But because of high pressure and low flow characteristic, general counter balance valve is unsuitable to cab tilting system. Therefore, this paper presents the developments of exclusive return pressure control valve which prevents sudden swing of cab and verify the validity of design through the computer simulation.

• Nuclear Engineering and Technology
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• v.56 no.3
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• pp.900-906
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• 2024

The Passively-Cooled Molten Salt Fast Reactor (PMFR) is one of the advanced design concepts of the Molten Salt Fast Reactor (MSFR) which utilizes a natural circulation for the primary loop and aims to attain a long-life operation without any means of fuel reprocessing. For an extended operation period, it is necessary to have enough fissile material, i.e., high excess reactivity, at the onset of operation. Since the PMFR is based on a fast neutron spectrum, direct implementation of a burnable absorber concept for the control of excess reactivity would be ineffective. Therefore, a localized moderator concept that encircles the active core has been envisioned for the PMFR which enables the effective utilization of a burnable absorber to achieve low reactivity swing and long-life operation. The modified PMFR design that incorporates a moderator and burnable absorber is presented, where depletion calculation is performed to estimate the reactor lifetime and reactivity swing to assess the feasibility of the proposed design. All the presented neutronic analysis has been conducted based on the Monte Carlo Serpent2 code with ENDF/B-VII.1 library.

• The KIPS Transactions:PartA
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• v.17A no.3
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• pp.121-126
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• 2010

This paper proposes a low-power MOS current-mode logic circuit with the low voltage swing technology and the high-threshold sleep-transistor. The sleep-transistor is used to high-threshold voltage PMOS transistor to minimize the leakage current. The $16{\times}16$ bit parallel multiplier is designed by the proposed circuit structure. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/104. The proposed circuit is achieved to reduce the power consumption by 11.7% and the power-delay-product by 15.1% compared with the conventional MOS current-model logic circuit in the normal mode. This circuit is designed with Samsung $0.18\;{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

• Journal of Advanced Marine Engineering and Technology
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• v.26 no.5
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• pp.544-553
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• 2002

The recent amount of container freight continuously has been increased, but the low efficiency of container crane causes jamming frequently in transportation and cargo handling at port. It is required that the working velocity and safety are improved by control of moving the trolley as quick as possible without large overshoot and any residual swing motion of container at the destination. In this paper, a LQ controller for a container crane is proposed to accomplish an optimal design of improved control system for minimizing the swing motion at destination. In this scheme a mathematical model for the system is obtained in state space form. Finally, the effectiveness of the proposed controller is verified through computer simulation.

• Clean Technology
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• v.23 no.2
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• pp.181-187
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• 2017

The perfluorocompounds (PFCs) emitted from the semiconductor and display manufacture is treated by abatement systems which use various technologies, such as combustion, thermal, plasma, catalyst. However, it is required that the system should overcome their drawbacks with excess energy consumption and low removal efficiency. The new technology using combination of pressure swing adsorption and excess enthalpy combustion for the reduction of PFCs emissions were developed and analyzed its characteristics. PFCs concentration ratio and PFCs loss factor were calculated from measuring concentration of PFCs at the calculated by comparing concentration of PFCs at the combustor's inlet and outlet. There were performance evaluations with various gas flow for comparing energy consumption and removal efficiency with existing equipments. The concentration ratio and the loss factor of PFCs were 1.65, 8.2%, respectively, when the total gas flow of the pressure swing absorption (PSA) inlet was 204 liter per minute (LPM) and $CF_4$ concentration was 1412 ppm. In comparison with existing system at constant condition, $CF_4$ removal efficiency for a porous media combustion (PMC) showed the improvement more than 16% and the consumed energy was also reduced up to approximately 41%. Then, the total gas flow introduced into PMC and $CF_4$ concentration were 91-LPM and 2335 ppm, respectively, and the destruction and removal efficiency of $CF_4$ was about 96% at 19-LPM $CH_4$, and 40-LPM $O_2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.8
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• pp.44-47
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• 2008

In this paper, a new circuit is proposed to minimize the charging and discharging current mismatch in charge pump for UWB PLL application. By adding a common-gate and a common-source amplifier and building the feedback voltage regulator, the high driving charge pump currents are accomplished. The proposed circuit has a wide operation voltage range, which ensures its good performance under the low power supply. The circuit has been implemented in an IBM 0.13um CMOS technology with 1.2V power supply. To evaluate the design effectiveness, some comparisons have been conducted against other circuits in the literature.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.35-42
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• 2005

This paper describes novel flip-flops with improved robustness and reduced power consumption. Variable sampling window flip-flop (VSWFF) adjusts the width of the sampling window according to input data, providing robust data latching as well as shorter hold time. The flip-flop also reduces power consumption for higher input switching activities as compared to the conventional low-power flip-flop. Clock swing-reduced variable sampling window flip-flop (CSR-VSWFF) reduces clock power consumption by allowing the use of a small swing clock. Unlike conventional reduced clock swing flip-flops, it requires no additional voltage higher than the supply voltage, eliminating design overhead related to the generation and distribution of this voltage. Simulation results indicate that the proposed flip-flops provide uniform latency for narrower sampling window and improved power-delay product as compared to conventional flip-flops. To evaluate the performance of the proposed flip-flops, test structures were designed and implemented in a $0.3\mu m$ CMOS process technology. Experimental result indicates that VSWFF yields power reduction for the maximum input switching activity, and a synchronous counter designed with CSR-VSWFF improves performance in terms of power consumption with no use of extra voltage higher than the supply voltage.