• 한국재료학회지
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• 제27권11호
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• pp.590-596
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• 2017

We demonstrated a CNT synaptic transistor by integrating 6,6-phenyl-C61 butyric acid methyl ester(PCBM) molecules as charge storage molecules in a polyimide(PI) dielectric layer with carbon nanotubes(CNTs) for the transistor channel. Specifically, we fabricated and compared three different kinds of CNT-based synaptic transistors: a control device with $Al_2O_3/PI$, a single PCBM device with $Al_2O_3/PI:PCBM$(0.1 wt%), and a double PCBM device with $Al_2O_3/PI:PCBM$(0.1 wt%)/PI:PCBM(0.05 wt%). Statistically, essential device parameters such as Off and On currents, On/Off ratio, device yield, and long-term retention stability for the three kinds of transistor devices were extracted and compared. Notably, the double PCBM device exhibited the most excellent memory transistor behavior. Pulse response properties with postsynaptic dynamic current were also evaluated. Among all of the testing devices, double PCBM device consumed such low power for stand-by and its peak current ratio was so large that the postsynaptic current was also reliably and repeatedly generated. Postsynaptic hole currents through the CNT channel can be generated by electrons trapped in the PCBM molecules and last for a relatively short time(~ hundreds of msec). Under one certain testing configuration, the electrons trapped in the PCBM can also be preserved in a nonvolatile manner for a long-term period. Its integrated platform with extremely low stand-by power should pave a promising road toward next-generation neuromorphic systems, which would emulate the brain power of 20 W.

• 디지털융복합연구
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• 제19권11호
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• pp.365-371
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• 2021

본 연구에서 고찰되는 가상발전소(VPP; Virtual Power Plant) 솔루션 플랫폼은 전력회사가 발전·송전설비 등의 건설에 소요되는 비용과 이와 관련된 투자리스크를 최소화 한다. 또한, 소비자의 전력 수요를 충족할 수 있도록 수요대응(DR; Demand Response) 프로그램운영 기능을 포함시켜 VPP도입으로 발전 및 송·배전부문에 대한 대규모 설비투자 없이 현존하는 발전기와 DR 프로그램 등을 통해서 소비자의 부하변화에 실시간으로 대처하여 보다 친환경적이고 효율적인 전력공급이 가능하도록 한다. 태양광 및 ESS 연동 장치에 통신 Device를 연동하기 위해서는 Device 장치와 Edge System간 제어·상태에서 데이터를 전달하고 IoT Device 및 연동 플랫폼 개발(OneM2M)이 필요하다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.500-510
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• 2013

In this paper, a high-sensitivity low power photodetector using double gate (DG) MOSFET is proposed for the first time using change in subthreshold current under illumination as the sensitivity parameter. An analytical model for optically controlled double gate (DG) MOSFET under illumination is developed to demonstrate that it can be used as high sensitivity photodetector and simulation results are used to validate the analytical results. Sensitivity of the device is compared with conventional bulk MOSFET and results show that DG MOSFET has higher sensitivity over bulk MOSFET due to much lower dark current obtained in DG MOSFET because of its effective gate control. Impact of the silicon film thickness and gate stack engineering is also studied on sensitivity.

• 한국산업정보학회논문지
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• 제12권4호
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• pp.32-40
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• 2007

모바일 단말은 객체기반 IP 스토리지의 대용량 데이터를 객체 단위로 IP 네트워크를 통해 접근하여 이용할 수 있다. 객체기반 IP 스토리지는 데이터 입출력 시 WLAN을 주로 이용하고 있으며, WLAN은 모바일 단말에서 소모 전력이 큰 장치 중의 하나로 알려져 있다. 본 논문에서는 효율적인 WLAN 전력제어를 포함하는 모바일 단말을 위한 저전력 객체기반 스토리지를 설계하고 구현한다. 제안하는 WLAN 전력 제어 기법은 스토리지로 향하는 네트워크 트래픽 내에 존재하는 유휴시간을 선반입버퍼를 이용하여 최대화하고, WLAN에서 제공하는 전력모드 상태를 제어하여 WLAN 전력소모를 최소화한다. PXA270기반 모바일 단말 상에서 멀티미디어 콘텐츠 재생을 통한 실험에서 제안한 기법을 이용할 경우에 모바일 단말 전체 소모 전력을 9% 이상 줄일 수 있음을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.495-498
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• 1998

Mobile computers have restrictions for size, weight, and power consumption that are different from traditional workstations. Storage device must be smaller, lighter. Low power consumed storage devices are needed. At the present time, flash memory device is a reasonable candidate for such device. But flash memory has drawbacks such as bulk erase operation and slow program time. This causes of worse average write performances. This paper suggests a storage method which improves write performance.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.713-717
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• 2011

This paper was carried out design of 600 V GaN power MOSFET Modeling. We decided trench gate type one for design. we carried out device and process simulation with T-CAD tools. and then, we have extracted optimal device and process parameters for fabrication. we have analysis electrical characteristics after simulations. As results, we obtained 600 V breankdown voltage and $0.4\;m{\Omega}cm^2ultra$ low on resistance. At the same time, we carried out field ring simulation for obtaining high voltage.

• 대한임베디드공학회논문지
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• 제13권3호
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• pp.143-149
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• 2018

It has become ever harder to design reliable circuits with each nanometer technology node; under normal operation conditions, a transistor device can be affected by various aging effects resulting in performance degradation and eventually design failure. The reliability (aging) effect has traditionally been the area of process engineers. However, in the future, even the smallest of variations can slow down a transistor's switching speed, and an aging device may not perform adequately at a very low voltage. Therefore, circuit designers need to consider these reliability effects in the early stages of design to make sure there are enough margins for circuits to function correctly over their entire lifetime. However, such an approach excessively increases the size and power dissipation of a system. As the impact of reliability, new techniques in designing aging-resilient circuits are necessary to reduce the impact of the aging stresses on performance, power, and yield or to predict the failure of a system. Therefore, in this paper, a novel low power on-chip self-tuning circuit considering the aging effects has been proposed.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.339-344
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• 2014

This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

• 한국산업융합학회 논문집
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• 제24권1호
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• pp.69-77
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• 2021

The widely used low-cost design methodology for IoT devices is very popular. In such a networked device, memory is composed of flash memory, SRAM, DRAM, etc., and because it processes a large amount of data, memory design is an important factor for system performance. Therefore, each device selects optimized design factors such as function, performance and cost according to market demand. The design of a memory architecture available for low-cost IoT devices is very limited with the configuration of SRAM, flash memory, and DRAM. In order to process as much data as possible in the same space, an architecture that supports parallel processing units is usually provided. Such parallel architecture is a design method that provides high performance at low cost. However, it needs precise software techniques for instruction and data mapping on the parallel architecture. This paper proposes an instruction/data mapping method to support optimized parallel processing performance. The proposed method optimizes system performance by actively using hardware and software parallelism.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1246-1247
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• 2008

With recent advanced in portable electric devices, wireless sensor, MEMS and bio-Mechanics device, the new typed power supply, not conventional battery but self-powered energy source is needed. Particularly, the system that harvests from their environments are interests for use in self powered devices. For very low powered devices, environmental energy may be enough to use power source. Therefore, in other to made piezoelectric energy harvesting device, PMN-PZT thick film was formed by the screen printing method on the Ag/Pd coated alumina substrate. The layer was 8 layers and slurry where a-terpineol, ethycellulose, ferro B-75001 as Vehicle, PMN-PZT powder used are fabricated by ball mill. The output power quality was be also investigated by changing the load resistance, weight and frequency. The made piezoelectric energy harvesting device was resulted from the conditions of 33$k{\Omega}$, 0.25g, 197Hz respectively. The thick film was prepared at the condition of 2.75Vrms, and its power was 230${\mu} W$ and its thickness was 56${mu}m$. The piezoelectric energy harvesting device output voltage was increased, when the load weight, load resistance was increasing and resonance frequency was diminishing. The other side, resonance frequency was diminished, when the weight was increasing. And output power was continuously it changed by load resistance, output voltage, weight and resonance frequency.