• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.1941-1948
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• 1997

In this paper, the power efficient linear upconversion mixer which is a functional circuit in transmit path of intermediate frequency(IF) part of Code Division Multiple (CDMA) cellular phone was explained. In generally, the low CMOS devices limits the implementation of upconversion mixer especially for lower loads. Using replica transconductor, the linear range is extended up to the limit. Thiscircuit was imprlemented using $0.8{\mu}\textrm{m}$ N-well CMOS technology with 2-poly/2-metal. The active area of chip is $0.53mm{\times}0.92mm$. The power consumption is 30mW with 3.3V suply voltage. The 1dB conpression characteristics is -27.3dB with $25{\Omega}$. load and being applied by 2-tone input signal. The mixer operates properly above 200MHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.595-604
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• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1167-1172
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• 2013

This paper presents a X-band doppler radar with high conversion gain using a self-oscillating-mixer(SOM) that oscillation and frequency mixing is realized at the same time. To improve phase noise of the SOM oscillator, a ${\lambda}/2$ slotted square patch resonator(SSPR) was proposed, which shows high Q-factor of 175.4 and the 50 % reduced circuit area compared to the conventional resonator. To implement the low power system, low biasing voltage of 1.7 V was supplied. To enhance the conversion gain of the SOM, bias circuit is configured near the pinch-off region of transistor, and the conversion gain was optimized. The output power of the proposed SOM was -3.16 dBm at 10.65 GHz. A high conversion gain of 9.48 dB was obtained whereas DC Power consumption is relatively low about 7.65 mW. The phase noise is -90.91 dBc/Hz at 100 kHz offset. The figure-of-merit(FOM) of the proposed SOM was measured as -181.8 dBc/Hz, which is supplier to other SOMs by more than about 7 dB.

• ETRI Journal
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• v.30 no.4
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• pp.526-534
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• 2008

This paper presents a fully integrated 0.13 ${\mu}m$ CMOS MB-OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low-pass filter, a variable gain amplifier, a voltage-to-current converter, an I/Q up-mixer, a differential-to-single-ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 ${\mu}m$ CMOS technology. The fabricated transmitter shows a -3 dB bandwidth of 550 MHz at each sub-band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.7-15
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• 2002

The digital DBS tuner is designed and implemented in a CMOS process using a direct-conversion architecture that offers a high degree of integration. To generate mathched LO I/Q quadrature signals covering the total input frequency range, a fully integrated ring oscillator is employed. And, to decrease a high level of phase noise of the ring oscillator, a frequency synthesizer is designed using a double loop strucure. This paper proposes and verifies a band selective loop for fast frequency switching time of the double loop frequency synthesizer. The down-conversion mixer with source follower input stages is used for low voltage operation. An experiment implementation of the frequency synthesizer and mixer with integrated a 0.25um CMOS process achieves a switching time of 600us when frequency changes from 950 to 2150MHz. And, the experiment results show a quadrature amplitude mismatch of max. 0.06dB and a quadrature phase mismathc of max. >$3.4^{\circ}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.482-489
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• 2010

In this paper we have proposed a new architecture of DQ-IRM(Double-Quadrature Image Rejection Mixer) for image rejection in the low-IF receiver. It consist of a frequency-tunable RF PPF(Poly Phase Filter) and the quadrature mixers. The conventional DQ-IRM generates the quadrature RF signals for the RF wide band at once. But the proposed DQ-IRM with the frequency-tuable RF PPF generates the quadrature RF signals for the narrow band of 2~3 channels bandwidth, which is partitioned from the RF wide band. We designed the CMOS RF tuner for T-DMB(Terrestrial Digital Multimedia Broadcasting) with the proposed 3rd DQ-IRM using a 0.18um CMOS technology and verified the performances of the designed receiver such as the image rejection ratio, the noise figure and the power consumption. The overall NF of the RF tuner is about 1.26 dB and the image reject ratio is about 51 dB. The power consumption is 55.8 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.5
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• pp.109-114
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• 2023

In this paper, a 2-channel Image-Reject receiver using a 65-nm CMOS process is presented for Ka-band compact radars. The designed receiver consists of Low-Noise Amplifier (LNA), IQ mixer, and Analog Baseband (ABB). ABB includes a complex filter in order to suppress unwanted images, and the variable gain amplifiers (VGAs) in RF block and ABB have gain tuning range from 4.5-56 dB for wide dynamic range. The gain of the receiver is controlled by on-chip SPI controllers. The receiver has noise figure of <15 dB, OP1dB of >4 dBm, image rejection ratio of >30 dB, and channel isolation of >45 dB at the voltage gain of 36 dB, in the Ka-band target frequency. The receiver consumes 420 mA at 1.2 V supply with die area of 4000×1600 ㎛.

• Journal of Environmental Health Sciences
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• v.39 no.3
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• pp.289-299
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• 2013

Objectives: For the field application of the dielectric barrier discharge plasma reactor, scale-up of the plasma reactor is needed. This study investigated the possibility of inactivation of microorganisms in sewage using pilot multi-plasma reactor. We also considered the possibility of degradation of total organic carbon (TOC) and nonbiodegradable matter ($UV_{254}$) in sewage. Methods: The pilot plasma reactor consists of plasma reactor with three plasma modules (discharge electrode and quartz dielectric tube), liquid-gas mixer, high voltage transformers, gas supply equipment and a liquid circulation system. In order to determine the operating conditions of the pilot plasma reactor, we performed experiments on the operation parameters such as gas and liquid flow rate and electric discharge voltage. Results: The experimental results showed that optimum operation conditions for the pilot plasma reactor in batch experiments were 1 L/min air flow rate), 4 L/min liquid circulation rate, and 13 kV electric discharge voltage, respectively. The main operation factor of the pilot plasma process was the high voltage. In continuous operation of the air plasma process, residual microorganisms, $UV_{254}$ absorbance and TOC removal rate at optimal condition of 13 kV were $10^{2.24}$ CFU/mL, 56.5% and 8.6%, respectively, while in oxygen plasma process at 10 kV, residual microorganisms, $UV_{254}$ absorbance and TOC removal rate at optimal conditions were $10^{1.0}$ CFU/mL, 73.3% and 24.4%, respectively. Electric power was increased exponentially with the increase in high voltage ($R^2$ = 0.9964). Electric power = $0.0492{\times}\exp^{(0.6027{\times}lectric\;discharge\;voltage)}$ Conclusions: Inactivation of microorganisms in sewage effluent using the pilot plasma process was done. The performance of oxygen plasma process was superior to air plasma process. The power consumption of oxygen plasma process was less than that of air plasma process. However, it was considered that the final evaluation of air and oxygen plasma must be evaluated by considering low power consumption, high process performance, operating costs and facility expenses of an oxygen generator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.861-863
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• 2003

In this work, the preparations and characteristics of capacitors and inductors for RF IC as a integrated devices are investigated. These kinds of capacitors and inductors can be applicable to the passive components utilized in voltage controlled oscillator(VCO), low noise amplifier(LAN), mixer and synthesizer for mobile telecommunication of radio frequency band(900 MHz to 2.2GHz), and in a library of monolithic microwave integrated circuit(MMIC). The results show that these inductors and capacitors array for RF IC may be applicable to the RF IC passive components for mobile telecommunication.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.247-247
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• 2000

A new bioelectric impedance measurement method is proposed for the precise measurement of the bioelectric impedance. To obtain the impedance from the known applied a.c. current and the measured voltage signals, a frequency conversion circuit, like the mixer in heterodyne receivers, is introduced to reduce the frequency of the original current. It can be observed from several lines of derivation that the impedance is independent on the amplitude and phase of the mixing signals. This makes it possible to use low-speed analog-to-digital converters and thus utilize cheaper electronic parts in the implementation. The possibility of the method is shown by simulations, and a generic structure applicable to bioelectric impedance measurement devices is also proposed.