• Title/Summary/Keyword: Low Mode

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Experiments on Welding of Ceramics by Use of High Power Laser (고출력 레이저를 이용한 세라믹 재료의 용접 실험)

  • 변철웅
    • Journal of Welding and Joining
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    • v.12 no.2
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    • pp.39-48
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    • 1994
  • In comparison to the conventional brazing, laser welding of ceramics has advantages of direct bonding without filler material, which causes the thermal stress due to the differences of thermal expansion coefficients. In pulse-mode, laser welding of dispersion ceramic having high thermal resistance is possible at relatively low preheating temperature of $1300^{\circ}C$ In CW-mode, alumina can be welded at high preheating temperature $1500^{\circ}C$ under the condition of low feed rate of 500 mm/min, respectively. Further studies on developing mechanism of pores in the bead during laser welding of ceramics is required.

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A Low Power scan Design Architecture (저전력을 고려한 스캔 체인 구조 변경)

  • Min, Hyoung-Bok;Kim, In-Soo
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.7
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    • pp.458-461
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    • 2005
  • Power dissipated during test application is substantially higher than power dissipated during functional operation which can decrease the reliability and lead to yield loss. This paper presents a new technique for power minimization during test application in full scan sequential circuits. This paper shows freezing of combinational logic parts during scan shift operation in test mode. The freezing technique leads to power to minimization. Significant power reduction in the scan techniques is achieved on ISCAS 89 benchmarks.

Photonic Quasi-crystal Fiber for Orbital Angular Momentum Modes with Ultra-flat Dispersion

  • Kim, Myunghwan;Kim, Soeun
    • Current Optics and Photonics
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    • v.3 no.4
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    • pp.298-303
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    • 2019
  • We propose a photonic quasi-crystal fiber (PQF) for supporting up to 14 orbital angular momentum (OAM) modes with low and ultra-flat dispersion characteristics over the C+L bands. The designed PQF which consists of a large hollow center and quasi structural small air holes in the clad region exhibits low confinement losses and a large effective index separation (>$10^{-4}$) between the vector modes. This proposed fiber could potentially be exploited for mode division multiplexing and other OAM mode applications in fibers.

An Experimental Study on Exhaust Gas Reduction of Diesel Oxidation Catalyst by CVS-75 Mode in Light Duty Diesel Engine (小型디젤機關에서 CVS-75 모드에 따른 디젤 酸化觸媒裝置의 排出가스 低減에 關한 實驗的 硏究)

  • 한영출;김종춘;오용석
    • Journal of Korean Society for Atmospheric Environment
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    • v.15 no.4
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    • pp.457-461
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    • 1999
  • Recently, increasing usage of diesel vehicle, many countries try to reduce the pollutant materials by emission regulation standard. Particularly, in our country, the supplement ratio of diesel vehicle is high, and air pollution by particulate matter(PM) is very serious. So, in theoretical study wer analyzed the formation principle of gaseous emission and PM, the characteristics of CVS-75 mode. In experimental study, we tested exhaust gas reduction of emission and PM, the characteristics of CVS-75 mode. In experimental study, we tested exhaust gas reduction of disel oxidation catalyst(DOC) by CVS-75 mode in light duty diesel vehicle. In case of an automobiletest with the 2,956cc diesel engine which DOC was equipped, CVS-75 mode which is similar to driving conditions on the road was chosen as the restrictive mode of light duty diesel automobile in our country. According to the Pt, the reduction rate of exhaust emission was estimated with using 0.1% high sulfur fuel and 0.05% low sulfur fuel.

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Design and Analysis of Current Mode Low Temperature Polysilicon TFT Inverter/Buffer

  • Lee, Joon-Chang;Jeong, Ju-Young
    • Journal of Information Display
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    • v.6 no.4
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    • pp.11-15
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    • 2005
  • We propose a current mode logic circuit design method for LTPS TFT for enhancing circuit operating speed. Current mode inverter/buffers with passive resistive load had been designed and fabricated. Measurement results indicated that the smaller logic swing of the current mode allowed significantly faster operation than the static CMOS. In order to reduce the chip size, both all pTFT and all nTFT active load current mode inverter/buffer had been designed and analyzed by HSPICE simulation. Even though the active load current mode circuits were inferior to the passive load circuits, it was superior to static CMOS gates.

Design of a Tripple-Mode DC-DC Buck Converter (3중 모드 DC-DC 벅 변환기 설계)

  • Yu, Seong-Mok;Park, Joon-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.15 no.2
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    • pp.134-142
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    • 2011
  • This paper describes a tripple-mode high-efficiency DC-DC buck converter. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(100mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~100mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 96.4% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is 1.15mm ${\times}$ 1.10mm including pads.

A Word Dictionary Structure for the Postprocessing of Hangul Recognition (한글인식 후처리용 단어사전의 기억구조)

  • ;Yoshinao Aoki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.9
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    • pp.1702-1709
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    • 1994
  • In the postprocessing of Hangul recognition system, the storage structure of contextual information is an important matter for the recognition rate and speed of the entire system. Trie in general is used to represent the context as word dictionary, but the memory space efficiency of the structure is low. Therefore we propose a new structure for word dictionary that has better space efficiency and the equivalent merits of trie. Because Hangul is a compound language, the language can be represented by phonemes or by characters. In the representation by phonemes(P-mode) the retrieval is fast, but the space efficiency is low. In the representation by characters(C-mode) the space efficiency is high, but the retrieval is slow. In this paper the two representation methods are combined to form a hybrid representation(H-mode). At first an optimal level for the combination is selected by two characteristic curves of node utilization and dispersion. Then the input words are represented with trie structure by P-mode from the first to the optimal level, and the rest are represented with sequentially linked list structure by C-mode. The experimental results for the six kinds of word set show that the proposed structure is more efficient. This result is based on the fact that the retrieval for H-mode is as fast as P-mode and the space efficiency is as good as C-mode.

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A Triple-Mode DC-DC Buck Converter with DPSS Function (DPSS 기능을 갖는 3중 모드 DC-DC Buck 변환기)

  • Yu, Seong-Mok;Hang, In-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.411-414
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    • 2011
  • This paper describes a tripple-mode DC-DC buck converter with DPSS Fucntion. The DC-DC buck converter operate in PWM(Pulse Width Modulation) mode at moderate to heavy loads(80mA~500mA), in PFM(Pulse Frequency Modulation)at light loads(1mA~80mA), and in LDO(Low Drop Out) mode at the sleep mode(<1mA). In PFM mode DPSS(Dynamic Partial Shutdown Strategy) is also employed to increase the efficiency at light loads. The triple-mode converter can thus achieve high efficiencies over wide load current range. The proposed DC-DC converter is designed in a CMOS 0.18um technology. It has a maximum power efficiency of 97.02% and maximum output current of 500mA. The input and output voltages are 3.3V and 2.5V, respectively. The chip size is $1465um{\times}895um$ including pads.

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A new continuous-time current-mode integrator for realization of low-voltage current-mode CMOS filter (저전압 전류모드 CMOS 필터 구현을 위한 새로운 연속시간 전류모드 적분기)

  • 방준호;조성익;김동용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.4
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    • pp.1068-1076
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    • 1996
  • In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analyog current-mode active filters is proposed. Compared to the current-mode integrator which is proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter is designed with the proposed current-mode integrator. The designed circuits are fabricated using the ORBIT's $1.2{\mu}{\textrm{m}}$ deouble-poly double-metal CMOS n-well process. The experimental results show that the filter has -3dB cutoff frequency at 44.5MHz and 3mW power dissipation with single 3.3V power supply and also $0.12mm^{2}$ chip area.

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Design of a DC Motor Current Controller Using a Sliding Mode Disturbance Observer and Controller (슬라이딩 모드 외란 관측기와 제어기를 이용한 DC 모터 전류 제어기 설계)

  • Kim, In Hyuk;Son, Young Ik
    • Journal of Institute of Control, Robotics and Systems
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    • v.22 no.6
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    • pp.417-423
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    • 2016
  • Using a sliding mode controller and observer techniques, this paper presents a robust current controller for a DC motor in the presence of parametric uncertainties. One of the most important issues in the practical application of sliding mode schemes is the chattering phenomenon caused by switching actions. This paper presents a novel sliding mode controller that incorporates an integral control with a sliding mode disturbance observer to attenuate the chattering by reducing the controller/observer switching gains. The proposed sliding mode disturbance observer is designed to estimate a relatively slow varying signal in the equivalent lumped disturbance owing to system uncertainties. Combining the estimated uncertainty with the sliding mode control input, the proposed controller can achieve the control objective by using the relatively low gain of the controller. The proposed disturbance observer does not include the switching control input of the baseline sliding mode controller to reduce the observer switching gain. In the proposed approach, the integral sliding mode control is used to improve the steady state control performance. Comparative computer simulations are carried out to demonstrate the performance of the proposed method. Through the simulation results, the proposed controller realizes the robust performance with reduced current ripples.