• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.2
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• pp.485-499
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• 2021

Although non-binary low-density parity-check (NB-LDPC) codes have better error-correction capability than that of binary LDPC codes, their decoding complexity is significantly higher. Therefore, it is crucial to reduce the decoding complexity of NB-LDPC while maintaining their error-correction capability to adopt them for various applications. The extended min-sum (EMS) algorithm is widely used for decoding NB-LDPC codes, and it reduces the complexity of check node (CN) operations via message truncation. Herein, we propose a low-cost CN processing method to reduce the complexity of CN operations, which take most of the decoding time. Unlike existing studies on low complexity CN operations, the proposed method employs quick selection algorithm, thereby reducing the hardware complexity and CN operation time. The experimental results show that the proposed selection-based CN operation is more than three times faster and achieves better error-correction performance than the conventional EMS algorithm.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.533-534
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• 2006

This paper presents the architecture design of a high-speed, low-complexity 128-point radix-$2^4$ FFT processor for ultra-wideband (UWB) systems. The proposed high-speed, low-complexity FFT architecture can provide a higher throughput rate and low hardware complexity by using 2-parallel data-path scheme and single-path delay-feedback (SDF) structure. This paper presents the key ideas applied to the design of high-speed, low-complexity FFT processor, especially that for achieving high throughput rate and reducing hardware complexity. The proposed FFT processor has been designed and implemented with the 0.18-m CMOS technology in a supply voltage of 1.8 V. The throughput rate of proposed FFT processor is up to 1 Gsample/s while it requires much smaller hardware complexity.

• Journal of Communications and Networks
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• v.10 no.4
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• pp.396-402
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• 2008

The use of network coding in wireless networks has been proposed in the literature for energy efficient broadcast. However, the decoding complexity of existing algorithms is too high for low-complexity devices. In this work we formalize the all-to-all information exchange problem and shows how to optimize the transmission scheme in terms of energy efficiency. Furthermore, we prove by construction that there exists O(1) -complexity network coding algorithms for grid networks which can achieve such optimality. We also present low-complexity heuristics for random. topology networks. Simulation results show that network coding algorithms outperforms forwarding algorithms in most cases.

• The Journal of the Acoustical Society of Korea
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• v.17 no.3E
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• pp.53-57
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• 1998

Spectral information at a speech coder should be quantized with sufficient accuracy to keep perceptually transparent output speech. Spectral information at a low bit rate speech coder is usually transformed into corresponding line spectrum pair parameters and is often quantized with a vector quantization algorithm. As the vector quantization algorithm generally has high complexity in the optimal code vector searching routine, the complexity reduction in that routine is investigated using the ordering property of the line spectrum pair. When the proposed complexity reduction algorithm is applied to the well-known split vector quantization algorithm, the 46% complexity reduction is achieved in the distortion measure compu-tation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.4C
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• pp.217-225
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• 2011

In this paper, we propose an adaptive de-interlacing algorithm that is based on the degree of local complexity. The conventional intra field de-interlacing algorithms show the different performance according to the ways which find the edge direction. Furthermore, FDD (Fine Directional De-interlacing) algorithm has the better performance than other algorithms but the computational complexity of FDD algorithm is too high. In order to alleviate these problems, the proposed algorithm selects the most efficient de-interacing algorithm among LA (Line Average), MELA (Modified Edge-based Line Average), and LCID (Low-Complexity Interpolation Method for De-interlacing) algorithms which have low complexity and good performance. The proposed algorithm is trained by the DoLC (Degree of Local Complexity) for selection of the algorithms mentioned above. Simulation results show that the proposed algorithm not only has the low complexity but also performs better objective and subjective image quality performances compared with the conventional intra-field methods.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.42-49
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• 2016

This paper proposes a low-complexity generator which finds the first two minimum values using bit-serial scheme. A low-complexity generator is an important part for low-area LDPC decoders based on the min-sum decoding algorithm because the hardware complexity of generators utilizes a significant portion of LDPC decoders. To reduce hardware complexity, bit-serial LDPC decoders has been studied. The generator of the existing bit-serial LDPC decoders can find only the first minimum value, and thus it leads to a BER performance degradation. The proposed generator using bit-serial scheme finds the first two minimum values. Hence, it can improve the BER performance. In addition, the area-time complexity of the proposed generator is lower than those of the existing generators finding the first two minima.

• Journal of Computing Science and Engineering
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• v.6 no.4
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• pp.310-319
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• 2012

Next generation wireless receivers demand low computational complexity algorithms with high computing power in order to perform fast signal detections and error estimations. Several signal detection and estimation algorithms have been proposed for next generation wireless receivers which are primarily designed to provide reasonable performance in terms of signal to noise ratio (SNR) and bit error rate (BER). However, none of them have been chosen for direct implementation as they offer high computational complexity with relatively lower computing power. This paper presents a low-complexity power-efficient algorithm that improves the computing power and provides relatively faster signal detection for next generation wireless multiuser receivers. Measurement results of the proposed algorithm are provided and the overall system performance is indicated by BER and the computational complexity. Finally, in order to verify the low-complexity of the proposed algorithm we also present a formal mathematical proof.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4C
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• pp.303-309
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• 2006

By combining the space-time diversity technique and iterative turbo codes, space-time turbo codes(STTCS) are able to provide powerful error correction capability. However, the multi-path transmission and iterative decoding structure of STTCS make the decoder very complex. In this paper, we propose a low complexity decoder, which can be used to decode STTCS as well as general iterative codes such as turbo codes. The efficient implementation of the backward recursion and the log-likelihood ratio(LLR) update in the proposed algorithm improves the computational efficiency. In addition, if we approximate the calculation of the joint LLR by using the approximate ratio(AR) algorithm, the computational complexity can be reduced even further. A complexity analysis and computer simulations over the Rayleigh fading channel show that the proposed algorithm necessitates less than 40% of the additions required by the conventional Max-Log-MAP algorithm, while providing the same overall performance.

• ETRI Journal
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• v.27 no.5
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• pp.639-642
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• 2005

This paper proposes two kinds of complexity-reduced algorithms for a low density parity check (LDPC) decoder. First, sequential decoding using a partial group is proposed. It has the same hardware complexity and requires a fewer number of iterations with little performance loss. The amount of performance loss can be determined by the designer, based on a tradeoff with the desired reduction in complexity. Second, an early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Once the edges are detected, no further iteration is required; thus early detection reduces the computational complexity.

• ETRI Journal
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• v.32 no.6
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• pp.837-842
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• 2010

This paper proposes robust source localization methods for estimating the azimuth angle, elevation angle, velocity, and range using a low-complexity planar antenna array in impulsive non-Gaussian noise environments. The proposed robust source localization methods for wireless communication applications are based on nonlinear M-estimation provided from Huber and Hampel. Simulation results show the robustness performance of the proposed robust methods in impulsive non-Gaussian noise.