• Journal of the Korean institute of surface engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• International Journal of Reliability and Applications
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• v.13 no.2
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• pp.91-104
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• 2012

Sarhan and Kundu (2009) introduced a new distribution named as the generalized linear failure rate distribution. This distribution generalizes several well known distributions. The probability density function of the generalized linear failure rate distribution can be right skewed or unimodal and its hazard function can be increasing, decreasing or bathtub shaped. This distribution can be used quite effectively to analyze lifetime data in place of linear failure rate, generalized exponential and generalized Rayleigh distributions. In this paper, we apply the simulated annealing algorithm to obtain the maximum likelihood point estimates of the parameters of the generalized linear failure rate distribution. Simulated annealing algorithm can not only find the global optimum; it is also less likely to fail because it is a very robust algorithm. The estimators obtained using simulated annealing algorithm have been compared with the corresponding traditional maximum likelihood estimators for their risks.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.365-371
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• 2003

We prepared silicon on insulator(SOI) wafer pairs of Si/1800${\AA}$ -SiO$_2$ ∥ 1800${\AA}$ -SiO$_2$/Si using water direct bonding method. Wafer pairs bonded at room-temperature were annealed by a normal furnace system or a fast linear annealing(FLA) equipment, and the micro-structure of bonding interfaces for each annealing method was investigated. Upper wafer of bonded pairs was polished to be 50 $\mu\textrm{m}$ by chemical mechanical polishing(CMP) process to confirm the real application. Defects and bonding area of bonded water pairs were observed by optical images. Electrical and mechanical properties were characterized by measuring leakage current for sweeping to 120 V, and by observing the change of wafer curvature with annealing process, respectively. FLA process was superior to normal furnace process in aspects of bonding area, I-V property, and stress generation.

• Korean Journal of Materials Research
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• v.12 no.10
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• pp.820-824
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• 2002

It is of importance to know that the bonding strength and interfacial stress of SOI wafer pairs to meet with mechanical and thermal stresses during process. We fabricated Si/2000$\AA$-SiO$_2$ ∥ 2000$\AA$-SiO$_2$/Si SOI wafer pairs with electric furnace annealing, rapid thermal annealing (RTA), and fast linear annealing (FLA), respectively, by varying the annealing temperatures at a given annealing process. Bonding strength and interfacial stress were measured by a razor blade crack opening method and a laser curvature characterization method, respectively. All the annealing process induced the tensile thermal stresses. Electrical furnace annealing achieved the maximum bonding strength at $1000^{\circ}C$-2 hr anneal, while it produced constant thermal tensile stress by $1000^{\circ}C$. RTA showed very small bonding strength due to premating failure during annealing. FLA showed enough bonding strength at $500^{\circ}C$, however large thermal tensile stress were induced. We confirmed that premated wafer pairs should have appropriate compressive interfacial stress to compensate the thermal tensile stress during a given annealing process.

• International conference on construction engineering and project management
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• 2007.03a
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• pp.530-539
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• 2007

Many construction projects such as highways, pipelines, tunnels, and high-rise buildings typically contain repetitive activities. Research has shown that the Critical Path Method (CPM) is not efficient in scheduling linear construction projects that involve repetitive tasks. Linear Scheduling Method (LSM) is one of the techniques that have been developed since 1960s to handle projects with repetitive characteristics. Although LSM has been regarded as a technique that provides significant advantages over CPM in linear construction projects, it has been mainly viewed as a graphical complement to the CPM. Studies of scheduling linear construction projects with resource consideration are rare, especially with multiple resource constraints. The objective of this proposed research is to explore a resource assignment mechanism, which assigns multiple critical resources to all activities to minimize the project duration while satisfying the activities precedence relationship and resource limitations. Resources assigned to an activity are allowed to vary within a range at different stations, which is a combinatorial optimization problem in nature. A heuristic multiple resource allocation algorithm is explored to obtain a feasible initial solution. The Simulated Annealing search algorithm is then utilized to improve the initial solution for obtaining near-optimum solutions. A housing example is studied to demonstrate the resource assignment mechanism.

• Journal of the Korean Magnetics Society
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• v.11 no.2
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• pp.78-83
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• 2001

The thermal characteristics of TMR devices by using Fast Linear Annealing method has been studied. A computer program that employs the finite differential method has been developed to simulate the temperature distribution of a diameter of 4" silicon wafer, which is subjected to radiation heat from the halogen lamp. We adopted the temperature of 350$\^{C}$, which is the highest temperature usually used in annealing for magnetic thin films. We changed moving velocity of the lamp from 0.05 mm/sec to 1 mm/sec. The moving velocity of halogen lamp has less effect on the local peak temperature of the sample only about 40$\^{C}$. Therefore, we may be able to anneal TMR devices in such short time of 1 minute and 40 seconds per one wafer, using the Fast Linear Annealing method.

• Korean Journal of Materials Research
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• v.14 no.5
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• pp.315-321
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• 2004

The void evolution in direct bonding process of $Si/Si_3$$N_4$ ∥ $SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.10
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• pp.859-864
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• 2003

We prepared SOI(silicon-on-insulator) wafer pairs of Si II SiO$_2$/Si$_3$N$_4$ II Si using wafer direct bonding with an electric furnace annealing(EFA), a fast linear annealing(FLA), and a rapid thermal annealing(RTA), respectively, by varying the annealing temperatures at a given annealing process. We measured the bonding area and the bonding strength with processes. EFA and FLA showed almost identical bonding area and theoretical bonding strength at the elevated temperature. RTA was not bonded at all due to warpage, We report that FLA process was superior to other annealing processes in aspects of surface temperature, annealing time, and bonding strength.

• Korean Journal of Materials Research
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• v.10 no.10
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• pp.665-670
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• 2000

Linear annealing method was developed to increase the bond strength of Si wafer pair mated at room tem­perature instead of conventional furnace annealing method. It has been known that the interval of the two mating wafer surfaces decreases and the density of gaseous phases generated at the interface increases with increase in an-nealing temperature. The new annealing method consisting of one heat source and light reflecting mirror used these two phenomena and was applied to Si$\mid$$\mid$Si and Si$\mid$$\mid$$SiO_2/Si$ bonding. The bonding interface observed directly by using IR camera and HRTEM showed clear bonding interface without any unbonded areas except the area generated by the dusts inserted into the mating interface at the room temperature. Crack opening method and direct tensile test was ap­pplied to measure the bond strength. The two methods showed similar results. The bond strength increased continuous­tly with the increase of annealing temperature.

• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.4 no.3
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• pp.209-216
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• 2006

Characteristics of heat release process, while the Wigner energy was drawn off the graphite during DSC(Differential Scanning Calorimenter) measurement as an example of annealing process which is one of release methods of Wigner energy that is contained in the irradiated graphite, was studied. Linear temperature rise method in DSC operation was selected to estimate the total Wigner energy content and the heat release rate of each graphite samples, which were located in several positions in the thermal column in KRR-2 research reactor. As an annealing process in DSC operation Wigner energy of the irradiated graphite samples were totally released by heat supplying to the graphite from room temperature to $500^{\circ}C$, in DSC. Characteristics of Wigner energy release from the graphite sample was well correlated with the various activation energy model of the kinetic equation.