• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2016.10a
• /
• pp.611-613
• /
• 2016

The characteristics of tunnel field-effect transistor(TFET) structure with source-overlapped gate was investigated using a TCAD simulations. Tunneling is mostly divided into line-tunneling and point-tunneling, and line-tunneling is higher performance than point-tunneling in terms of subthreshold swing(SS) and on-current. In this paper, from the simulation results of source-overlapped gate length effects at silicon(Si), germanium(Ge), Si-Ge hetero TFET structure, the guideline of optimal structure with highest performance are proposed.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.12 no.12
• /
• pp.2188-2194
• /
• 2008

Home network is the connection and communication of several electronic and electrical devices at hone with the integration of several technologies like Ethernet, wireless, phone line and power-line at the residential gateway to the internet. This internet based home network can be accessed from any part of the world through any device by any poison via internet. Since home network is developed for comfortable and safe life of home users, the information flow to/from home network needs to be private. Hence the remote access of the home network must be secured. This paper analyses two secure tunneling methods, voluntary and compulsory for L2TP(Layer Two Tunneling Protocol) based VPN(Virtual Private Network) for secure remote access of the home network.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2018.10a
• /
• pp.512-513
• /
• 2018

Trap-assisted-tunneling (TAT) degrades subthreshold slope of real-world tunneling field-effect-transistors (TFET) and it should be considered in the simulation. However, its mechanism is not very well understood in line tunneling type L-shaped TFET (LTFET). This study investigates TAT mechanism in LTFETs using dynamic nonlcoal Schenk model. Both phonon assisted and direct band to trap tunneling events are considered in this study.

• Journal of information and communication convergence engineering
• /
• v.19 no.4
• /
• pp.263-268
• /
• 2021

Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

• Geomechanics and Engineering
• /
• v.15 no.2
• /
• pp.739-744
• /
• 2018

This paper presents the results of numerical modeling studies on the effect of displacements of tunneling in granular soils. Presence of building loads is considered, to find displacement generated at the surface on tunnel. Effect of varying eccentricities of building is simulated, to find influence of building on vertical and horizontal displacement. Studies were carried out in two cases of with and without a geosynthetic layer installed at the bottom of the footing. Results of analysis revealed, the presence of geosynthetic layer under footing, with building placed on centre line, reduced the surface displacements compared to displacement generated without geosynthetic layer. Presence of geosynthetic layer under footing had a dominant effect in reducing displacements in high storey structures. However, when the building was shifted to greater eccentricities from centre line, presence of geosynthetic layer, led to insignificant reduction of displacements on the centre line at the surface.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.5
• /
• pp.869-875
• /
• 2017

Using TCAD simulation, performances of tunnel field-effect transistors (TFETs) was investigated. Drain current-gate voltage types of TFET structure such as single-gate TFET (SG-TFET), double-gate TFET (DG-TFET), L-shaped TFET (L-TFET), and Pocket-TFET (P-TFET) are simulated, and then as dielectric constant of gate oxide and channel length are varied their subthreshold swing (SS) and on-current ($I_{on}$) are compared. On-currents and subthreshold swings of the L-TFET and P-TFET structures with high electric constant and line tunneling were 10 times and 20 mV/dec more than those of the SG-TFET and DG-TFET using point tunneling, respectively. Especially, it is shown that hump effect which dominant current element changes from point tunneling to line tunneling, is disappeared in P-TFET with high-k gate oxide such as $HfO_2$. The analysis of 4 types of TFET structure provides guidelines for the design of new types of TFET structure which concentrate on line tunneling by minimizing point tunneling.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.5
• /
• pp.876-884
• /
• 2017

The current-voltage characteristics of Silicon(Si), Germanum(Ge), and hetero tunnel field-effect transistors(TFETs) with source-overlapped gate structure was investigated using TCAD simulations in terms of tunneling. A Si-TFET with gate oxide material $SiO_2$ showed the hump effects in which line and point tunneling appear simultaneously, but one with gate oxide material $HfO_2$ showed only the line tunneling due to decreasing threshold voltage and it shows better performance than one with gate oxide material $SiO_2$. Tunneling mechanism of Ge and hetero-TFETs with gate oxide material of both $SiO_2$ and $HfO_2$ are dominated by point tunneling, and showed higher leakage currents, and Si-TFET shows better performance than Ge and hetero-TFETs in terms of SS. These simulation results of Si, Ge, and hetero-TFETs with source-overlapped gate structure can give the guideline for optimal TFET structures with non-silicon channel materials.

• Proceedings of the IEEK Conference
• /
• 1999.06a
• /
• pp.950-953
• /
• 1999

Spin tunneling giant magnetoresistance effect was studied to utilize in the application of random access memory. Ferromagnetic/Insulator/Ferromagnetic films were sputtered on glass substrates and perpendicular current was applied. Measurements of magneto- resistance of the junction showed 8.6% of MR ratio. Voltage output depends on the magnetization directions of the write line and read line, thus enabling the system to be used as a random access memory

• Journal of Magnetics
• /
• v.8 no.2
• /
• pp.89-92
• /
• 2003

The tunneling magnetoresistance (TMR) of a ramp-edge type junction with SrTiO$_3$barrier layer has been stud-ied. The samples with a structure of glass/NiO(600${\AA}$)/Co(100${\AA}$)/SrTiO$_3$(400 ${\AA}$)/SrTiO$_3$(20-100${\AA}$)/NiFe(100${\AA}$) were prepared by the sputtering and etched by the electron cyclotron (ECR) argon ion milling. Nonlinear I-V characteristics were obtained from a ramp-type tunneling junctions, having the dominant difference between two different external magnetic fields (${\pm}$100 Oe) perpendicular to the junction edge line. In the SrTiO$_3$ barrier thickness of 40${\AA}$, the TMR was 52.7% at a bias voltage of -50 mV The bias voltage dependence of resistance and TMR in a ramp-type tunneling junction was similar with those of the layered TMR junction.

• Geomechanics and Engineering
• /
• v.15 no.5
• /
• pp.1039-1046
• /
• 2018

This paper presents a limit analysis of the series of construction stages of shallow tunneling method by investigating their respective safety factors and failure mechanisms. A case study for one particular cross-section of Beijing Subway Line 7 is undertaken, with a focus on the effects of multiple soil layers and construction sequencing of dual tunnels. Results show that using the step-excavation technique can render a higher safety factor for the excavation of a tunnel compared to the entire cross-section being excavated all at once. The failure mechanisms for each different construction stage are discussed and corresponding key locations are suggested to monitor the safety during tunneling. Simultaneous excavation of dual tunnels in the same cross-section should be expressly avoided considering their potential negative interactions. The normal and shear forces as well as bending moment of the primary lining and locking anchor pipe are found to reach their maximum value at Stage 6, before closure of the primary lining. Designing these struts should consider the effects of different construction stages of shallow tunneling method.