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http://dx.doi.org/10.6109/jicce.2021.19.4.263

Compact Capacitance Model of L-Shape Tunnel Field-Effect Transistors for Circuit Simulation  

Yu, Yun Seop (ICT & Robotics Engineering and IITC, Hankyong National University)
Najam, Faraz (National Disability Insurance Agency, Tuggeranong Australian Capital Territory)
Publication Information
Journal of information and communication convergence engineering / v.19, no.4, 2021 , pp. 263-268 More about this Journal
Abstract
Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.
Keywords
Compact model; Capacitance; Inverter; Tunnel filed-effect transistor; Verilog-A;
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