• 한국농공학회지
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• 제33권4호
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• pp.73-83
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• 1991

A numerical simulation of a 2-dimensional tidal flow in a shallow sea was performed using the frequency domain finite element method. In this study, to overcome the inherent problems of a time domain model which requires high eddy viscosity and small time steps to insure numerical stability, the harmonic function incorporated with the linearized function of governing equations was applied. Calculations were carried out using the developed tidal model(TIDE) in a rectangular channel of lOm(depth) X 4km (width) X 25km(length) under the condition of tidal waves entering the channel closed at one end for both with and without bottom friction damping. The predicted velocities and water levels at different points of the channel were in close agreement with less than 1 % error between the numerical and analytical solutions. The results showed that the characteristics of the tidal flow were greatly affected by the magnitude of tidal elevation forcing, and not by on surface friction, wind, or the linear bottom friction when the value was less than 0.01. For the optimum size of grid to obtain a consistent solution, the ratio between the length of the maximum grid and the tidal wave length should be less than 0.0018. It was concluded that the finite element tidal model(TIDE) developed in this study could handle the numerical simulation of tidal flows for more complex geometrical conditions.

• Journal of Electrical Engineering and Technology
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• 제2권2호
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• pp.267-273
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• 2007

A depletion-mode MOSFET has been analyzed to evaluate its electrical behavior using a novel 3-D numerical simulation package. The characterizing analysis of the BC MOSFET was performed through short-channel narrow-channel and small-geometry effects that are investigated, in detail, in terms of the threshold voltage. The DIBL effect becomes significant for a short-channel device with a channel length of $<\;3({\mu}m)$. For narrow-channel devices the variation of the threshold voltage was sharp for $<4({\mu}m)$ due to the strong narrow-channel effect. In the case of small-geometry devices, the shift of the threshold voltage was less sensitive due to the combination of the DIBL and substrate bias effects, as compared with that observed from the short-channel and narrow-channel devices. The characterizing analysis of the narrow-channel and small-geometry devices, especially with channel width of $<\;4({\mu}m)$ and channel area of $<\;4{\times}4({\mu}m^2)$ respectively, can be accurately performed only from a 3-D numerical simulation due to their sharp variations in threshold voltages.

• 전자공학회논문지A
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• 제29A권8호
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• pp.78-88
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• 1992

To improve the characteristics of sub$\mu$m short channel MOSFET device, a new device having the convex structure is proposed. This device has 3-dimensionally expandable channel length according to the vertical etched silicon height. For the purpose of comparing the DC and AC characteristics, planar device is also fabricated. Comparing the channel length, the convex device with 0.4$\mu$m silicon height is larger about 0.56$\mu$m in NMOS and 0.78$\mu$m in PMOS than planar devices. DC characteristics, such as threshold voltage, operational current, substrate current and breakdown voltage are compared together with AC characteristics using the ring oscillator inverter delay. Also process and device simulation are performed and the differences between convex and pranaldevice are also compared.

• 한국전기전자재료학회논문지
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• 제36권2호
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• pp.129-135
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• 2023

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2014년도 추계학술대회
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• pp.773-776
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• 2014

본 연구에서는 채널 길이와 폭의 변화에 따른 실리콘 나노와이어 MOSFET 소자의 아날로그 특성을 비교 분석 하였다. 측정 온도는 $30^{\circ}C$, $50^{\circ}C$, $75^{\circ}C$, $100^{\circ}C$이다. 사용된 소자의 폭은 20nm, 30nm, 80nm, 130nm 와 길이는 250nm, 300nm, 250nm, 500nm을 사용하였다. 소자의 아날로그 특성은 이동도, 트랜스컨덕턴스, Early 전압, 전압이득, 드레인 전류 이다. 이동도는 폭이 증가함에 따라 증가하고 길이와 온도가 증가할수록 감소한다. 트랜스 컨덕턴스는 폭이 증가하면 증가한다. Early 전압은 길이와 온도가 증가함에 따라 증가하고 폭이 증가함에 따라 감소한다. 따라서 이득은 폭의 감소와 길이가 증가함에 따라 증가하고 온도가 증가함에 따라 감소하는 것을 알 수 있었다.

• 물과 미래
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• 제14권1호
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• pp.39-49
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• 1981

하천 재해 방지 및 하천 유지의 관점에서 반드시 구명되어야 하는 하천 사행에 관한 연구는 자연 현상에 대한 관점에서 출발하여, 금세기초부터 체계적이고 과학적인 연구가 진행되어 왔다. 그 발생 원인은 정설이 확립되지 않은 가운데 복합적인 여러 요인에 의하여 사행은 생성, 발달되며, mechanism의 고찰과 함께 계량형태학적 분석으로 사행 특성이 일부 밝혀지고 있다. 본 연구에서는 유로연장 30km 이상의 67개 대상하천에서 사행특성인자인 사행파장(M$$)과 사행대(M$$) 등의 관계를 구명하여 유량과의 상관성을 분석하였다. 또한 하천의 기점에서 종점까지의 직선 거리에 대한 유로 연장의 비인 유로형상계수(L$$)를 처음으로 제안했으며, 유로 연장에 대한 만곡부연장의 비인 Tortuosity(t)와 더불어, 유로연장, 사행경사, Horton의 유역형상계수 등과 상관분석 및 복합회귀분석을 시행한 결과 L$$와 T가 하천사행의 한 척도가 됨을 밝혔다. 사행 유로부와 직유로부에서 유속과 수면경사, 하상굴곡도(degre of sinuosity)를 비교 검토한 결과, 사행 유로부가 직유로부보다 하상의 안정성이 높음을 알았다. 하천 수계별 사행파장과 사행대의 상관식은 각기 선형관계와 역함수관계로 대별되었으며, 남한강 수계의 경우에는 선형관계, 낙동강, 금강 수계의 경우에는 역함수 관계식을 제시하였다.

• 대한교통학회지
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• 제8권1호
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• pp.5-15
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• 1990

As a result of the lack of methodology for the determination of navigational channel capacity and the consequence lack of effective management of traffic, navigational channels are often grossly underutilized or highly congested. The traditional rule of first-come-first-served admission of vessels to channels is not efficient as it assumes equal time intervals between entrance of consecutive vessels. A new vessel traffic management system is developed in this research and methodologies to measure the improvement in the channel capacity are developed. Methodology to measure the channel performances for three queue disciplines are developed. The effects of changes in major factors on the channel capacity model such as channel length, fleet mix and arrival rate, as well as changes in strategy are analyzed. Under given channel conditions, best strategy are recommended. Also, a method for effective stochastic channel capacity simulation was developed. The results of analysis and as ertions are compared with the results of simulation runs to prove their applicability.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(4)
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• pp.179-182
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• 2001

This paper has been studied a wavelet based still image transmission over the wireless channel. EZW(Embedded Zerotree Wavelet) is an efficient and scalable wavelet based image coding technique, which provides progressive transfer of signal resulted in multi-resolution representation. It reduces therefore the reduce cost of storage media. Although EZW has many advantages, it is very sensitive on error. Because coding are performed in subband by subband, and it uses arithmetic coding which is a kind of variable length coding. Therefore only 1∼2bit error may degrade quality of the entire image. So study of error localization and recovery are required. This paper investigates the use of reversible variable length codes(RVLC) and data partitioning. RVLC are known to have a superior error recovery property due to their two-way decoding capability and data partitioning is essential to applying RVLC. In this work, we show that appropriate data partitioning length for each SNR(Signal-to-Noise Power Ratio) and error localization in wireless channel.

• 한국정보통신학회논문지
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• 제10권9호
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• pp.1648-1653
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• 2006

이 연구에서는 해석학적 전류-전압 모델을 이용하여 DGMOSFET(Double Gate MOSFET)의 전송특성을 분석하였다. MOSFET의 게이트길이가 100nm이하로 작아지면 산화막두께가 1.5m이하로 작아져야만하고 채널의 도핑이 매우 증가하기 때문에 소자의 문턱전압변화, 누설전류의 증가 등 다양한 문제가 발생하게 된다 이러한 문제를 조사하기 위하여 해석학적 전류-전압 모델을 이용하여 소자의 크기를 변화시키면서 전류-전압특성을 조사하였다 소자의 크기를 변화시키면서 해석학적 전류-전압 모델의 타당성을 조사하였으며 온도 변화에 대한 특성도 비교 분석하였다. 게이트 전압이 2V에서 77K의 전류-전압 특성이 실온에서 보다 우수하다는 것을 알 수 있었다.

• 대한전자공학회논문지SD
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• 제41권4호
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• pp.9-14
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• 2004

매몰 산화층 밑의 실리콘 기판에 자기정렬 방법으로 ground plane 전극을 만든 SOI MOSFET의 단채널 현상과 Punchthrough 특성을 측정·분석하였다. 채널 길이가 $0.2{\mu}m$ 이하의 소자에서는 GP-SOI 소자가 FD-SOI 소자보다 채널 길이에 따른 문턱전압 저하 및 subthreshold swing이 작고 DIBL 현상이 크게 개선됨을 알 수 있었다. 기판전압에 따른 문턱전압 특성으로부터 GP-SOI 소자의 body factor가 FD-SOI 소자보다 큰 것을 알 수 있었다. 그리고 punchthrough 전압 특성으로부터 GP-SOI 소자의 punchthrough 전압이 FD-SOI 소자보다 큰 것을 알 수 있었다.