• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2004.11a
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• pp.666-669
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• 2004

Substructures position is considered as design parameter to obtain optimal structural changes to raise its dynamic characteristics. In conventional SDM (structural dynamics modification) method, the layout of modifying substructures position is first fixed and at that condition the structural optimization is performed by using the substructures size and/or material property as design parameters. But in this paper as a design variable substructures global translational and rotational position is treated. For effective structural modification the eigenvalue sensitivity with respect to that design parameter is derived based on measured frequency response function. The optimal structural modification is calculated by combining eigenvalue sensitivities and eigenvalue reanalysis technique iteratively. Numerical examples are presented to the case of beam stiffener optimization to raise the natural frequency of plate.

• Journal of Electrical Engineering and Technology
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• v.12 no.4
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• pp.1619-1626
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• 2017

Electronic components that are used in high-level radiation environment require a semiconductor device having a radiation-hardened characteristic. In this paper, we proposed a radiation-hardened I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistors) using a layout modification technique only. The proposed I-gate n-MOSFET structure is modified as an I-shaped gate poly in order to mitigate a radiation-induced leakage current in the standard n-MOSFET structure. For verification of its radiation-hardened characteristic, the M&S (Modeling and Simulation) of the 3D (3-Dimension) structure is performed by TCAD (Technology Computer Aided Design) tool. In addition, we carried out an evaluation test using a $Co^{60}$ gamma-ray source of 10kGy(Si)/h. As a result, we have confirmed the radiation-hardened level up to a total ionizing dose of 20kGy(Si).

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11b
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• pp.599-604
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• 2002

Substructures position is considered as design parameter to obtain optimal structural changes to raise its dynamic characteristics. In conventional SDM (structural dynamics modification) method, the layout of modifying substructures position is first fixed and at that condition the structural optimization is performed by using the substructures size and/or material property as design parameters. But in this paper as a design variable substructures global translational and rotational position is treated. For effective structural modification the eigenvalue sensitivity with respect to that design parameter is derived based on measured frequency response function. The optimal structural modification is calculated by combining eigenvalue sensitivities and eigenvalue reanalysis technique iteratively. Numerical examples are presented to the case of beam stiffener optimization to raise the natural frequency of plate.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.581-582
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• 2006

In this paper, we investigate three different types of multi-fingered layout nMOSFET devices with varying $W_f$(unit finger width) and $N_f$(number of finger). Using layout modification, we improve $f_T$(current gain cutoff frequency) value of 15GHz without scaling down, and moreover, we decrease $NF_{min}$(minimum noise figure) by 0.23dB at 5GHz. The RF noise can be reduced by increasing $f_T$, choosing proper finger width, and reducing the gate resistance. For the same total gate width using multi-fingered layout, the increase of finger width shows high $f_T$ due to the reduced parasitic capacitance. However, this does not result in low $NF_{min}$ since the gate resistance generating high thermal noise becomes larger under wider finger width. We can obtain good RF characteristics for MOSFETs by using a layout optimization technique.

• Transactions of the Korean Society of Automotive Engineers
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• v.19 no.4
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• pp.99-106
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• 2011

This paper deals with engine room layout design optimization of fuel cell electric vehicle (FCEV), which has been proposed as a potential alternative to fossil fuel depletion. Investing the great R&D efforts, the global vehicle manufacturers, especially Honda motor corporate, have shown not prototype vehicle but commercial vehicle using fuel cell in the market recently. In this paper, we analyze cooling performance and flow characteristic in the engine room of newly FCEV, in addition we suggest the optimization process for engine room layout design optimization. The two radiators in the vehicle for fuel cell stack and electronic components cooling have been analyzed and their performance are obtained in terms of cooling performance ratio (CPR). The value of CPR should always be less than one and based on criteria, we have achieved the optimum cooling performance of radiators for stack and electronic components. Aerodynamic performance is evaluated in terms of drag coefficient, improved through underbody modification using air devices.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.4
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• pp.1765-1794
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• 2019

Genetic Programming (GP) is an intelligence technique whereby computer programs are encoded as a set of genes which are evolved utilizing a Genetic Algorithm (GA). In other words, the GP employs novel optimization techniques to modify computer programs; imitating the way humans develop programs by progressively re-writing them for solving problems automatically. Trial programs are frequently altered in the search for obtaining superior solutions due to the base is GA. These are evolutionary search techniques inspired by biological evolution such as mutation, reproduction, natural selection, recombination, and survival of the fittest. The power of GAs is being represented by an advancing range of applications; vector processing, quantum computing, VLSI circuit layout, and so on. But one of the most significant uses of GAs is the automatic generation of programs. Technically, the GP solves problems automatically without having to tell the computer specifically how to process it. To meet this requirement, the GP utilizes GAs to a "population" of trial programs, traditionally encoded in memory as tree-structures. Trial programs are estimated using a "fitness function" and the suited solutions picked for re-evaluation and modification such that this sequence is replicated until a "correct" program is generated. GP has represented its power by modifying a simple program for categorizing news stories, executing optical character recognition, medical signal filters, and for target identification, etc. This paper reviews existing literature regarding the GPs and their applications in different scientific fields and aims to provide an easy understanding of various types of GPs for beginners.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.1-11
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• 2008

This work proposes a 15b 50MS/s CMOS pipeline ADC based on digital code-error calibration. The proposed ADC adopts a four-stage pipeline architecture to minimize power consumption and die area and employs a digital calibration technique in the front-end stage MDAC without any modification of critical analog circuits. The front-end MDAC code errors due to device mismatch are measured by un-calibrated back-end three stages and stored in memory. During normal conversion, the stored code errors are recalled for code-error calibration in the digital domain. The signal insensitive 3-D fully symmetric layout technique in three MDACs is employed to achieve a high matching accuracy and to measure the mismatch error of the front-end stage more exactly. The prototype ADC in a 0.18um CMOS process demonstrates a measured DNL and INL within 0.78LSB and 3.28LSB. The ADC, with an active die area of $4.2mm^2$, shows a maximum SNDR and SFDR of 67.2dB and 79.5dB, respectively, and a power consumption of 225mW at 2.5V and 50MS/s.