• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.4A
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• pp.414-422
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• 2011

This paper describes a design of low-density parity-check(LDPC) decoder supporting block length 2,304-bit and code rate 1/2 of IEEE 802.16e mobile WiMAX standard. The designed LDPC decoder employs the min-sum algorithm and partially parallel layered-decoding architecture which processes a sub-matrix of $96{\times}96$ in parallel. By exploiting the properties of the min-sum algorithm, a new memory reduction technique is proposed, which reduces check node memory by 46% compared to conventional method. Functional verification results show that it has average bit-error-rate(BER) of $4.34{\times}10^{-5}$ for AWGN channel with Fb/No=2.1dB. Our LDPC decoder synthesized with a $0.18{\mu}m$ CMOS cell library has 174,181 gates and 52,992 bits memory, and the estimated throughput is about 417 Mbps at 100-MHz@l.8-V.

• ETRI Journal
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• v.30 no.6
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• pp.807-817
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• 2008

We present a low-density parity-check (LDPC)-based, threaded layered space-time-frequency system with emphasis on the iterative receiver design. First, the unbiased minimum mean-squared-error iterative-tree-search (U-MMSE-ITS) detector, which is known to be one of the most efficient multi-input multi-output (MIMO) detectors available, is improved by augmentation of the partial-length paths and by the addition of one-bit complement sequences. Compared with the U-MMSE-ITS detector, the improved detector provides better detection performance with lower complexity. Furthermore, the improved detector is robust to arbitrary MIMO channels and to any antenna configurations. Second, based on the structure of the iterative receiver, we present a low-complexity belief-propagation (BP) decoding algorithm for LDPC-codes. This BP decoder not only has low computing complexity but also converges very fast (5 iterations is sufficient). With the efficient receiver employing the improved detector and the low-complexity BP decoder, the proposed system is a promising solution to high-data-rate transmission over selective-fading channels.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.126-130
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• 2005

In this paper, a low-complexity maximum-likelihood (ML) decoder based on QR decomposition, called real-valued LCMLDec decoder or RVLCMLDec for short, is proposed for the Vertical Bell Labs Layered Space-Time (V-BLAST) architecture, a promising candidate for providing high data rates in future fixed wireless communication systems [1]. Computer simulations, in comparison with other detection techniques, show that the proposed decoder is capable of providingthe V-BLAST schemes with ML performance at low detection complexity.

• Journal of information and communication convergence engineering
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• v.3 no.2
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• pp.76-79
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• 2005

In this paper, a low-complexity maximum-likelihood (ML) decoder based on QR decomposition, called real-valued LCMLDec decoder or RVLCMLDec for short, is proposed for the Vertical Bell Labs Layered Space-Time (V-BLAST) architecture, a promising candidate for providing high data rates in future fixed wireless communication systems [1]. Computer simulations, in comparison with other detection techniques, show that the proposed decoder is capable of providing the V­BLAST schemes with ML performance at low detection complexity

• Journal of Communications and Networks
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• v.8 no.3
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• pp.275-285
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• 2006

Suitable for multi-input multi-output (MIMO) communications, the joint beamforming space-time block coding (JBSTBC) scheme is proposed for high-speed downlink transmission. The major functionality of the scheme entails space-time block encoder and joint transmit and receive eigen-beamformer (EBF) incorporating with block-ordered layered decoder (BOLD), and its operating principle is described in this paper. Within these functionalities, the joint EBFs will be utilized for decorrelating fading channels to cause an enhancement in the spatial diversity gain. Furthermore, to fortify the capability of layered successive interference cancellation (LSIC) in block-ordered layered decoding process, this paper will develop a simple ad-hoc transmit power discrimination scheme (TPDS) based on a particular power discrimination function (PDF). To confirm the superior behavior of the proposed JBSTBC scheme employing ad-hoc TPDS, computer simulations will be conducted under various channel conditions with the provision of detailed mathematical derivations for clarifying its functionality.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.2
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• pp.363-371
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• 2013

This paper describes a multi-standard LDPC decoder which supports 19 block lengths(576~2304) and 6 code rates(1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6) of IEEE 802.16e mobile WiMAX standard and 3 block lengths(648, 1296, 1944) and 4 code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A DFU(decoding function unit) based on sign-magnitude arithmetic is used for hardware reduction. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.13-${\mu}m$ CMOS cell library. It has 312,000 gates and 70,000 bits RAM. The estimated throughput is about 79~210 Mbps at 100 MHz@1.8v.

• Journal of Navigation and Port Research
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• v.36 no.10
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• pp.845-849
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• 2012

The next-generation wireless communication requires fast transmission speeds with various services and high reliability. In order to satisfy these needs we study MIMO system used layered space time coded system (LST) combining space time trellis codes (STTC) with turbo codes. In LST, two codes that are inner and outer codes are concatenated in the serial fashion. The inner codes are turbo Pi codes suggested in DVB-RCS NG system, and outer codes are STTC codes proposed by Blum. The interleaver technique is used to efficiently combine two codes. And we proposed and simulated that a full iteration method between turbo decoder and BCJR decoder to improve the performance instead of only processing inner-iteration turbo decoder. The simulation results of proposed effective layered method show improving BER performance about 1.3~1.5dB than conventional one.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.132-135
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• 2011

This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.722-725
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• 2010

In this paper, BER performance and error convergence speed of layered LDPC(Low Density Parity Check) decoder which supports IEEE 802.16e WiMAX standard is analyzed, and optimal design conditions for hardware implementation are derived. A LDPC decoder is modeled and simulated at AWGN channel with QPSK modulation by Matlab. The parity check matrix(PCM) for IEEE 802.16e standard which has block lengths of 576, 1440, 2304 and code rates of 1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6 are used. Fixed-point simulation results show that fixed-point bit-width should be more than 8 bits for acceptable decoding performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2B
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• pp.325-333
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• 2010

Most communication systems including Wibro use quasi-cyclic LDPC codes composed of circulants. However, it is very difficult to design quasi-cyclic(QC) LDPC codes with optimal degree distribution satisfying conditions on layered decoding and girth due to the restriction of the size of its base matrix. In this paper, we propose a good solution by introducing superposition matrices to QC LDPC codes. We derive the conditions on checking girth of QC LDPC codes with superposition matrices, and propose new decoder to support layered decoding both for original QC LDPC codes and their modifications with superposition matrices. Simulation results show considerable improvements to convergence speed and error-correcting performance of proposed scheme which adopts QC LDPC codes with superposition matrices.