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http://dx.doi.org/10.6109/jkiice.2013.17.2.363

A Design of Multi-Standard LDPC Decoder for WiMAX/WLAN  

Seo, Jin-Ho (금오공과대학교 전자공학부)
Park, Hae-Won (금오공과대학교 전자공학부)
Shin, Kyung-Wook (금오공과대학교 전자공학부)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.17, no.2, 2013 , pp. 363-371 More about this Journal
Abstract
This paper describes a multi-standard LDPC decoder which supports 19 block lengths(576~2304) and 6 code rates(1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6) of IEEE 802.16e mobile WiMAX standard and 3 block lengths(648, 1296, 1944) and 4 code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A DFU(decoding function unit) based on sign-magnitude arithmetic is used for hardware reduction. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.13-${\mu}m$ CMOS cell library. It has 312,000 gates and 70,000 bits RAM. The estimated throughput is about 79~210 Mbps at 100 MHz@1.8v.
Keywords
LDPC; error correction code; WiMAX; WLAN; min-sum algorithm; layered decoding;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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