• Title/Summary/Keyword: LDPC(Low Density Parity Code)

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Space-Time Carrier Interferometry Techniques with Low-density Parity Check Code for High-speed Multimedia Communications

  • Chung Yeon-Ho
    • Journal of Korea Multimedia Society
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    • v.9 no.6
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    • pp.728-734
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    • 2006
  • Carrier interferometry code is considered as a promising scheme that provides significant performance improvement via frequency diversity effect. Space-time coding is commonly employed to achieve a performance gain through space diversity. The combination of these techniques and forward error correction coding will lead to enhanced system capacity and performance. This paper presents a low-density parity check (LDPC) coded space-time orthogonal frequency division multiplexing (OFDM) transmission scheme with carrier interferometry code for high-capacity and high-performance mobile multimedia communications. Computer simulations demonstrate that the proposed mobile multimedia transmission system offers a considerable performance improvement of approximately 9dB in terms of Eb/No in the Rayleigh fading channel with relatively low delay spread, in comparison with space-time OFDM. Performance gains are further increased, comparing with traditional OFDM systems.

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UEP Effect Analysis of LDPC Codes for High-Quality Communication Systems (고품질 통신 시스템을 위한 LDPC 부호의 UEP 성능 분석)

  • Yu, Seog Kun;Joo, Eon Kyeong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.6
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    • pp.471-478
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    • 2013
  • Powerful error control and increase in the number of bits per symbol should be provided for future high-quality communication systems. Each message bit may have different importance in multimedia data. Hence, UEP(unequal error protection) may be more efficient than EEP(equal error protection) in such cases. And the LDPC(low-density parity-check) code shows near Shannon limit error correcting performance. Therefore, the effect of UEP with LDPC codes is analyzed for high-quality message data in this paper. The relationship among MSE(mean square error), BER(bit error rate) and the number of bits per symbol is analyzed theoretically. Then, total message bits in a symbol are classified into two groups according to importance to prove the relationship by simulation. And the UEP performance is obtained by simulation according to the number of message bits in each group with the constraint of a fixed total code rate and codeword length. As results, the effect of UEP with the LDPC codes is analyzed by MSE according to the number of bits per symbol, the ratio of the message bits, and protection level of the classified groups.

A Variable Rate LDPC Coded V-BLAST System (가변 부호화 율을 가지는 LDPC 부호화된 V-BLAST 시스템)

  • Noh, Min-Seok;Kim, Nam-Sik;Park, Hyun-Cheol
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.55-58
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    • 2004
  • This this paper, we propose vertical Bell laboratories layered space time (V-BLAST) system based on variable rate Low-Density Parity Check (LDPC) codes to improve performance of receiver when QR decomposition interference suppression combined with interference cancellation is used over independent Rayleigh fading channel. The different rate LDPC codes can be made by puncturing some rows of a given parity check matrix. This allows to implement a single encoder and decoder for different rate LDPC codes. The performance can be improved by assigning stronger LDPC codes in lower layer than upper layer because the poor SNR of first detected data streams makes error propagation. Keeping the same overall code rates, the V-BLAST system with different rate LDPC codes has the better performance (in terms of Bit Error Rate) than with constant rate LDPC code in fast fading channel.

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The Effect of Block Interleaving in an LDPC-Turbo Concatenated Code

  • Lee, Sang-Hoon;Joo, Eon-Kyeong
    • ETRI Journal
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    • v.28 no.5
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    • pp.672-675
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    • 2006
  • The effect of block interleaving in a low density parity check (LDPC)-turbo concatenated code is investigated in this letter. Soft decoding can be used in an LDPC code unlike the conventional Reed-Solomon (RS) code. Thus, an LDPC-turbo concatenated code can show better performance than the conventional RS-turbo concatenated code. Furthermore, the performance of an LDPC-turbo code can be improved by using a block interleaver between the LDPC and turbo code. The average number of iterations in LDPC decoding can also be reduced by a block interleaver.

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Design of an Efficient LDPC Codec for Hardware Implementation (하드웨어 구현에 적합한 효율적인 LDPC 코덱의 설계)

  • Lee Chan-Ho;Park Jae-Geun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.7 s.349
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    • pp.50-57
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    • 2006
  • Low-density parity-check (LDPC) codes are recently emerged due to its excellent performance. However, the parity check (H) matrices of the previous works are not adequate for hardware implementation of encoders or decoders. This paper proposes a hybrid parity check matrix which is efficient in hardware implementation of both decoders and encoders. The hybrid H-matrices are constructed so that both the semi-random technique and the partly parallel structure can be applied to design encoders and decoders. Using the proposed methods, the implementation of encoders can become practical while keeping the hardware complexity of the partly parallel decoder structures. An encoder and a decoder are designed using Verilog-HDL and compared with the previous results.

Low Density Parity Check (LDPC) Coded OFDM System Using Unitary Matrix Modulation (UMM) (UMM(Unitary Matrix Modulation)을 이용한 LDPC(Low Density Parity Check) 코디드 OFDM 시스템)

  • Kim Nam Soo;Kang Hwan Min;Cho Sung Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.5A
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    • pp.436-444
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    • 2005
  • Unitary matrix modulation (UMM) is investigated in multiple antennas system that is called unitary space-time modulation (USTM). In an OFDM, the diagonal components of UMM with splitting over the coherence bandwidth (UMM-S/OFDM) have been proposed. Recently LDPC code is strongly attended and studied due to simple decoding property with good error correction property. In this paper, we propose LDPC coded UMM-S/OFDM for increasing the system performance. Our proposed system can obtain frequency diversity using UMM-S/OFDM like USTM/OFDM, and large coding gain using LDPC code. The superior characteristics of the proposed UMM-S/OFDM are demonstrated by extensive computer simulations in multi-path Rayleigh fading channel.

Row-splitting Algorithm for Low Density Parity Check Codes (LDPC 부호를 위한 행 분할 알고리즘)

  • Jung, Man-Ho;Lee, Jong-Hoon;Kim, Soo-Young;Song, Sang-Seob
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.2
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    • pp.92-96
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    • 2008
  • Practical communication systems need to operate at various different rates. This paper describes and analyzes low-density parity check codes for various different rates. From a specific mother code, it allows LDPC codes for different rate. The advantage of this technique is that each different rate LDPC codes have a same block length as mother code though the rate changes so it can make up for the weak points of puncturing and shortening which reduce their block length as the rate changes. Row-splitting method is to split the row, so that the rate changes from a higher rate to lower rate and cause of its own property, it can overcome the defect of row-combining method.

New Decoding Scheme for LDPC Codes Based on Simple Product Code Structure

  • Shin, Beomkyu;Hong, Seokbeom;Park, Hosung;No, Jong-Seon;Shin, Dong-Joon
    • Journal of Communications and Networks
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    • v.17 no.4
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    • pp.351-361
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    • 2015
  • In this paper, a new decoding scheme is proposed to improve the error correcting performance of low-density parity-check (LDPC) codes in high signal-to-noise ratio (SNR) region by using post-processing. It behaves as follows: First, a conventional LDPC decoding is applied to received LDPC codewords one by one. Then, we count the number of word errors in a predetermined number of decoded codewords. If there is no word error, nothing needs to be done and we can move to the next group of codewords with no delay. Otherwise, we perform a proper post-processing which produces a new soft-valued codeword (this will be fully explained in the main body of this paper) and then apply the conventional LDPC decoding to it again to recover the unsuccessfully decoded codewords. For the proposed decoding scheme, we adopt a simple product code structure which contains LDPC codes and simple algebraic codes as its horizontal and vertical codes, respectively. The decoding capability of the proposed decoding scheme is defined and analyzed using the parity-check matrices of vertical codes and, especially, the combined-decodability is derived for the case of single parity-check (SPC) codes and Hamming codes used as vertical codes. It is also shown that the proposed decoding scheme achieves much better error correcting capability in high SNR region with little additional decoding complexity, compared with the conventional LDPC decoding scheme.

An analysis of BER performance of LDPC decoder for WiMAX (WiMAX용 LDPC 복호기의 비트오율 성능 분석)

  • Kim, Hae-Ju;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.05a
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    • pp.771-774
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    • 2010
  • In this paper, BER performance of LDPC(Low-Density Parity-Check) decoder for WiMAX is analyzed, and optimal design conditions of LDPC decoder are derived. The min-sum LDPC decoding algorithm which is based on an approximation of LLR sum-product algorithm is modeled and simulated by Matlab, and it is analyzed that the effects of LLR approximation bit-width and maximum iteration cycles on the bit error rate(BER) performance of LDCP decoder. The parity check matrix for IEEE 802.16e standard which has block length of 2304 and code rate of 1/2 is used, and AWGN channel with QPSK modulation is assumed. The simulation results show that optimal BER performance is achieved for 7 iteration cycles and LLR bit-width of (8,6).

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A Multi-mode LDPC Decoder for IEEE 802.16e Mobile WiMAX

  • Shin, Kyung-Wook;Kim, Hae-Ju
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.1
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    • pp.24-33
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    • 2012
  • This paper describes a multi-mode LDPC decoder which supports 19 block lengths and 6 code rates of Quasi-Cyclic LDPC code for Mobile WiMAX system. To achieve an efficient implementation of 114 operation modes, some design optimizations are considered including block-serial layered decoding scheme, a memory reduction technique based on the min-sum decoding algorithm and a novel method for generating the cyclic shift values of parity check matrix. From fixed-point simulations, decoding performance and optimal hardware parameters are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 380,000 gates and 52,992 bits RAM, and the estimated throughput is about 164 ~ 222 Mbps at 56 MHz@1.8 V.